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[PATCH v9 06/46] target/arm: Add DISAS_UPDATE_NOCHAIN
From: |
Richard Henderson |
Subject: |
[PATCH v9 06/46] target/arm: Add DISAS_UPDATE_NOCHAIN |
Date: |
Thu, 25 Jun 2020 20:31:04 -0700 |
Add an option that writes back the PC, like DISAS_UPDATE_EXIT,
but does not exit back to the main loop.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate.h | 2 ++
target/arm/translate-a64.c | 3 +++
target/arm/translate.c | 4 ++++
3 files changed, 9 insertions(+)
diff --git a/target/arm/translate.h b/target/arm/translate.h
index d5edef2943..6dfe24cedc 100644
--- a/target/arm/translate.h
+++ b/target/arm/translate.h
@@ -173,6 +173,8 @@ static inline void disas_set_insn_syndrome(DisasContext *s,
uint32_t syn)
* return from cpu_tb_exec.
*/
#define DISAS_EXIT DISAS_TARGET_9
+/* CPU state was modified dynamically; no need to exit, but do not chain. */
+#define DISAS_UPDATE_NOCHAIN DISAS_TARGET_10
#ifdef TARGET_AARCH64
void a64_translate_init(void);
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index e4795ae100..027be7d8c2 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -14298,6 +14298,9 @@ static void aarch64_tr_tb_stop(DisasContextBase
*dcbase, CPUState *cpu)
case DISAS_EXIT:
tcg_gen_exit_tb(NULL, 0);
break;
+ case DISAS_UPDATE_NOCHAIN:
+ gen_a64_set_pc_im(dc->base.pc_next);
+ /* fall through */
case DISAS_JUMP:
tcg_gen_lookup_and_goto_ptr();
break;
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 146ff5ddc2..c39a929b93 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -8874,6 +8874,7 @@ static void arm_tr_tb_stop(DisasContextBase *dcbase,
CPUState *cpu)
case DISAS_NEXT:
case DISAS_TOO_MANY:
case DISAS_UPDATE_EXIT:
+ case DISAS_UPDATE_NOCHAIN:
gen_set_pc_im(dc, dc->base.pc_next);
/* fall through */
default:
@@ -8897,6 +8898,9 @@ static void arm_tr_tb_stop(DisasContextBase *dcbase,
CPUState *cpu)
case DISAS_TOO_MANY:
gen_goto_tb(dc, 1, dc->base.pc_next);
break;
+ case DISAS_UPDATE_NOCHAIN:
+ gen_set_pc_im(dc, dc->base.pc_next);
+ /* fall through */
case DISAS_JUMP:
gen_goto_ptr();
break;
--
2.25.1
- [PATCH v9 00/46] target/arm: Implement ARMv8.5-MemTag, system mode, Richard Henderson, 2020/06/25
- [PATCH v9 01/46] target/arm: Add isar tests for mte, Richard Henderson, 2020/06/25
- [PATCH v9 02/46] target/arm: Improve masking of SCR RES0 bits, Richard Henderson, 2020/06/25
- [PATCH v9 03/46] target/arm: Add support for MTE to SCTLR_ELx, Richard Henderson, 2020/06/25
- [PATCH v9 04/46] target/arm: Add support for MTE to HCR_EL2 and SCR_EL3, Richard Henderson, 2020/06/25
- [PATCH v9 05/46] target/arm: Rename DISAS_UPDATE to DISAS_UPDATE_EXIT, Richard Henderson, 2020/06/25
- [PATCH v9 07/46] target/arm: Add MTE system registers, Richard Henderson, 2020/06/25
- [PATCH v9 06/46] target/arm: Add DISAS_UPDATE_NOCHAIN,
Richard Henderson <=
- [PATCH v9 08/46] target/arm: Add MTE bits to tb_flags, Richard Henderson, 2020/06/25
- [PATCH v9 09/46] target/arm: Implement the IRG instruction, Richard Henderson, 2020/06/25
- [PATCH v9 11/46] target/arm: Implement the ADDG, SUBG instructions, Richard Henderson, 2020/06/25
- [PATCH v9 10/46] target/arm: Revise decoding for disas_add_sub_imm, Richard Henderson, 2020/06/25
- [PATCH v9 12/46] target/arm: Implement the GMI instruction, Richard Henderson, 2020/06/25
- [PATCH v9 13/46] target/arm: Implement the SUBP instruction, Richard Henderson, 2020/06/25
- [PATCH v9 14/46] target/arm: Define arm_cpu_do_unaligned_access for user-only, Richard Henderson, 2020/06/25
- [PATCH v9 15/46] target/arm: Implement LDG, STG, ST2G instructions, Richard Henderson, 2020/06/25
- [PATCH v9 16/46] target/arm: Implement the STGP instruction, Richard Henderson, 2020/06/25
- [PATCH v9 17/46] target/arm: Restrict the values of DCZID.BS under TCG, Richard Henderson, 2020/06/25