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[PATCH v8 01/45] target/arm: Add isar tests for mte
From: |
Richard Henderson |
Subject: |
[PATCH v8 01/45] target/arm: Add isar tests for mte |
Date: |
Tue, 23 Jun 2020 12:36:14 -0700 |
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu.h | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 677584e5da..f8ac11e73b 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3814,6 +3814,16 @@ static inline bool isar_feature_aa64_bti(const
ARMISARegisters *id)
return FIELD_EX64(id->id_aa64pfr1, ID_AA64PFR1, BT) != 0;
}
+static inline bool isar_feature_aa64_mte_insn_reg(const ARMISARegisters *id)
+{
+ return FIELD_EX64(id->id_aa64pfr1, ID_AA64PFR1, MTE) != 0;
+}
+
+static inline bool isar_feature_aa64_mte(const ARMISARegisters *id)
+{
+ return FIELD_EX64(id->id_aa64pfr1, ID_AA64PFR1, MTE) >= 2;
+}
+
static inline bool isar_feature_aa64_pmu_8_1(const ARMISARegisters *id)
{
return FIELD_EX64(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) >= 4 &&
--
2.25.1
- [PATCH v8 00/45] target/arm: Implement ARMv8.5-MemTag, system mode, Richard Henderson, 2020/06/23
- [PATCH v8 01/45] target/arm: Add isar tests for mte,
Richard Henderson <=
- [PATCH v8 02/45] target/arm: Improve masking of SCR RES0 bits, Richard Henderson, 2020/06/23
- [PATCH v8 03/45] target/arm: Add support for MTE to SCTLR_ELx, Richard Henderson, 2020/06/23
- [PATCH v8 04/45] target/arm: Add support for MTE to HCR_EL2 and SCR_EL3, Richard Henderson, 2020/06/23
- [PATCH v8 05/45] target/arm: Rename DISAS_UPDATE to DISAS_UPDATE_EXIT, Richard Henderson, 2020/06/23
- [PATCH v8 08/45] target/arm: Add MTE bits to tb_flags, Richard Henderson, 2020/06/23
- [PATCH v8 07/45] target/arm: Add MTE system registers, Richard Henderson, 2020/06/23
- [PATCH v8 06/45] target/arm: Add DISAS_UPDATE_NOCHAIN, Richard Henderson, 2020/06/23
- [PATCH v8 09/45] target/arm: Implement the IRG instruction, Richard Henderson, 2020/06/23
- [PATCH v8 10/45] target/arm: Revise decoding for disas_add_sub_imm, Richard Henderson, 2020/06/23