[PATCH 00/21] target/arm: Finish neon decodetree conversion

[Peter Maydell]

This patchset completes the conversion of Neon to decodetree
by converting all the instructions in the 2-reg-misc grouping.

There are some potential further cleanups available, which I don't
propose to do (I've spent what feels like too much time on this
refactoring already; I want to move onto implementing FP16 now,
which is what the refactoring was intended to permit):

 * the oddball "TCG temps in global variables" cpu_V0, cpu_V1,
   cpu_M0 are now used only in the iwmmxt codegen; V0 and V1
   would be easy to replace with local temporaries. M0 is
   slightly trickier. The main thing that dissuades me from
   this refactoring is that I don't have an easy way to test the
   iwmmxt codegen.

 * we have a confusingly large number of ways to load and
   store from the Neon/VFP register file:
    - neon_load_reg/neon_store_reg
    - neon_load_reg64/neon_store_reg64
    - neon_load_reg32/neon_store_reg32
    - neon_load_element/neon_store_element
    - neon_load_element64/neon_store_element64
   which all have subtly different semantics. The way that
   neon_load_reg/neon_store_reg do a "create temp on load,
   destroy temp on store" and none of the rest do is particularly
   confusing. I'd like us to have fewer of these but it's not
   immediately obvious what the correct small set of primitives
   should be.

 * it would be nice to make the vfp and neon decode really
   separate translation units rather than #including them
   into translate.c someday

thanks
-- PMM

Peter Maydell (21):
  target/arm: Convert Neon 2-reg-misc VREV64 to decodetree
  target/arm: Convert Neon 2-reg-misc pairwise ops to decodetree
  target/arm: Convert VZIP, VUZP to decodetree
  target/arm: Convert Neon narrowing moves to decodetree
  target/arm: Convert Neon 2-reg-misc VSHLL to decodetree
  target/arm: Convert Neon VCVT f16/f32 insns to decodetree
  target/arm: Convert vectorised 2-reg-misc Neon ops to decodetree
  target/arm: Convert Neon 2-reg-misc crypto operations to decodetree
  target/arm: Rename NeonGenOneOpFn to NeonGenOne64OpFn
  target/arm: Fix capitalization in NeonGenTwo{Single,Double}OPFn
    typedefs
  target/arm: Make gen_swap_half() take separate src and dest
  target/arm: Convert Neon 2-reg-misc VREV32 and VREV16 to decodetree
  target/arm: Convert remaining simple 2-reg-misc Neon ops
  target/arm: Convert Neon VQABS, VQNEG to decodetree
  target/arm: Convert simple fp Neon 2-reg-misc insns
  target/arm: Convert Neon 2-reg-misc fp-compare-with-zero insns to
    decodetree
  target/arm: Convert Neon 2-reg-misc VRINT insns to decodetree
  target/arm: Convert Neon 2-reg-misc VCVT insns to decodetree
  target/arm: Convert Neon VSWP to decodetree
  target/arm: Convert Neon VTRN to decodetree
  target/arm: Move some functions used only in translate-neon.inc.c to
    that file

 target/arm/translate.h          |    8 +-
 target/arm/neon-dp.decode       |  106 +++
 target/arm/translate-a64.c      |    8 +-
 target/arm/translate-neon.inc.c | 1191 ++++++++++++++++++++++++++++++-
 target/arm/translate.c          | 1061 +--------------------------
 5 files changed, 1311 insertions(+), 1063 deletions(-)

-- 
2.20.1