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Re: [PATCH 6/7] hw/arm/mps2: Map the FPGA I/O block


From: Philippe Mathieu-Daudé
Subject: Re: [PATCH 6/7] hw/arm/mps2: Map the FPGA I/O block
Date: Tue, 16 Jun 2020 12:36:26 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0

On 6/16/20 12:26 PM, Peter Maydell wrote:
> On Tue, 16 Jun 2020 at 07:32, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
> 
>> @@ -337,6 +339,11 @@ static void mps2_common_init(MachineState *machine)
>>
>>          sysbus_create_simple("versatile_i2c", i2cbase[i], NULL);
>>      }
>> +    sysbus_init_child_obj(OBJECT(mms), "fpgaio", &mms->fpgaio,
>> +                          sizeof(mms->fpgaio), TYPE_MPS2_FPGAIO);
>> +    object_property_set_bool(OBJECT(&mms->fpgaio), true, "realized",
>> +                             &error_fatal);
>> +    sysbus_mmio_map(SYS_BUS_DEVICE(&mms->fpgaio), 0, 0x40028000);
> 
> AN385 TRM isn't entirely clear but I suspect that you need to set
> the FPGAIO's prescale-clk property because the default of 20MHz
> isn't what the AN385 runs at. The FPGAIO model's default is written
> to match the AN505, which is 20MHz, but AN385 and AN511 are both
> 25MHz:
> https://developer.arm.com/tools-and-software/development-boards/fpga-prototyping-boards/mps2

Ah I only checked for the I/O register. I'll check the clocks.

> 
> thanks
> -- PMM
> 



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