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Re: [PATCH 2/6] hw/misc: Add NPCM7xx System Global Control Registers dev
From: |
Joel Stanley |
Subject: |
Re: [PATCH 2/6] hw/misc: Add NPCM7xx System Global Control Registers device model |
Date: |
Tue, 9 Jun 2020 01:36:14 +0000 |
On Thu, 21 May 2020 at 20:40, Havard Skinnemoen <hskinnemoen@google.com> wrote:
>
> Implement a device model for the System Global Control Registers in the
> NPCM730 and NPCM750 BMC SoCs.
>
> This is primarily used to enable SMP boot (the boot ROM spins reading
> the SCRPAD register); other registers are best effort for now.
>
> The reset values of the MDLR and PWRON registers are determined by the
> SoC variant (730 vs 750) and board straps respectively.
>
> Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
> Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
This looks similar to the aspeed scu model :)
Reviewed-by: Joel Stanley <joel@jms.id.au>
- Re: [PATCH 2/6] hw/misc: Add NPCM7xx System Global Control Registers device model,
Joel Stanley <=