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[PATCH v7 30/42] target/arm: Use mte_check1 for sve LD1R
From: |
Richard Henderson |
Subject: |
[PATCH v7 30/42] target/arm: Use mte_check1 for sve LD1R |
Date: |
Tue, 2 Jun 2020 18:13:05 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate-sve.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index e515646db2..4b3b879815 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -4830,16 +4830,16 @@ static bool trans_LD1RQ_zpri(DisasContext *s,
arg_rpri_load *a)
/* Load and broadcast element. */
static bool trans_LD1R_zpri(DisasContext *s, arg_rpri_load *a)
{
- if (!sve_access_check(s)) {
- return true;
- }
-
unsigned vsz = vec_full_reg_size(s);
unsigned psz = pred_full_reg_size(s);
unsigned esz = dtype_esz[a->dtype];
unsigned msz = dtype_msz(a->dtype);
TCGLabel *over = gen_new_label();
- TCGv_i64 temp;
+ TCGv_i64 temp, clean_addr;
+
+ if (!sve_access_check(s)) {
+ return true;
+ }
/* If the guarding predicate has no bits set, no load occurs. */
if (psz <= 8) {
@@ -4862,7 +4862,9 @@ static bool trans_LD1R_zpri(DisasContext *s,
arg_rpri_load *a)
/* Load the data. */
temp = tcg_temp_new_i64();
tcg_gen_addi_i64(temp, cpu_reg_sp(s, a->rn), a->imm << msz);
- tcg_gen_qemu_ld_i64(temp, temp, get_mem_index(s),
+ clean_addr = gen_mte_check1(s, temp, false, true, msz);
+
+ tcg_gen_qemu_ld_i64(temp, clean_addr, get_mem_index(s),
s->be_data | dtype_mop[a->dtype]);
/* Broadcast to *all* elements. */
--
2.25.1
- Re: [PATCH v7 22/42] target/arm: Move regime_tcr to internals.h, (continued)
- [PATCH v7 24/42] target/arm: Add gen_mte_checkN, Richard Henderson, 2020/06/02
- [PATCH v7 27/42] target/arm: Add helper_mte_check_zva, Richard Henderson, 2020/06/02
- [PATCH v7 28/42] target/arm: Use mte_checkN for sve unpredicated loads, Richard Henderson, 2020/06/02
- [PATCH v7 29/42] target/arm: Use mte_checkN for sve unpredicated stores, Richard Henderson, 2020/06/02
- [PATCH v7 30/42] target/arm: Use mte_check1 for sve LD1R,
Richard Henderson <=
- [PATCH v7 31/42] target/arm: Add mte helpers for sve scalar + int loads, Richard Henderson, 2020/06/02
- [PATCH v7 32/42] target/arm: Add mte helpers for sve scalar + int stores, Richard Henderson, 2020/06/02
- [PATCH v7 34/42] target/arm: Handle TBI for sve scalar + int memory ops, Richard Henderson, 2020/06/02
- [PATCH v7 33/42] target/arm: Add mte helpers for sve scalar + int ff/nf loads, Richard Henderson, 2020/06/02
- [PATCH v7 36/42] target/arm: Complete TBI clearing for user-only for SVE, Richard Henderson, 2020/06/02