Re: [PATCH v2 09/10] net: cadence_gem: TX_LAST bit should be set by guest

[Edgar E. Iglesias]

On Mon, May 04, 2020 at 07:36:07PM +0530, Sai Pavan Boddu wrote:
> TX_LAST bit should not be set by hardware, its set by guest to inform
> the last bd of the frame.

Reviewed-by: Edgar E. Iglesias <address@hidden>


> 
> Signed-off-by: Sai Pavan Boddu <address@hidden>
> Signed-off-by: Edgar E. Iglesias <address@hidden>
> ---
>  hw/net/cadence_gem.c | 6 ------
>  1 file changed, 6 deletions(-)
> 
> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> index ac3a553..f0bf2e7 100644
> --- a/hw/net/cadence_gem.c
> +++ b/hw/net/cadence_gem.c
> @@ -345,11 +345,6 @@ static inline unsigned tx_desc_get_last(uint32_t *desc)
>      return (desc[1] & DESC_1_TX_LAST) ? 1 : 0;
>  }
>  
> -static inline void tx_desc_set_last(uint32_t *desc)
> -{
> -    desc[1] |= DESC_1_TX_LAST;
> -}
> -
>  static inline unsigned tx_desc_get_length(uint32_t *desc)
>  {
>      return desc[1] & DESC_1_LENGTH;
> @@ -1270,7 +1265,6 @@ static void gem_transmit(CadenceGEMState *s)
>  
>              /* read next descriptor */
>              if (tx_desc_get_wrap(desc)) {
> -                tx_desc_set_last(desc);
>  
>                  if (s->regs[GEM_DMACFG] & GEM_DMACFG_ADDR_64B) {
>                      packet_desc_addr = s->regs[GEM_TBQPH];
> -- 
> 2.7.4
>