[PATCH RFC 1/3] target/arm: Implement SVE2 AESMC, AESIMC

[Stephen Long]

Signed-off-by: Stephen Long <address@hidden>
---
 target/arm/helper-sve.h    |  3 +++
 target/arm/sve.decode      | 10 ++++++++++
 target/arm/sve_helper.c    | 13 +++++++++++++
 target/arm/translate-sve.c | 18 ++++++++++++++++++
 4 files changed, 44 insertions(+)

diff --git a/target/arm/helper-sve.h b/target/arm/helper-sve.h
index f6ae814021..6e8421991c 100644
--- a/target/arm/helper-sve.h
+++ b/target/arm/helper-sve.h
@@ -2687,3 +2687,6 @@ DEF_HELPER_FLAGS_5(sve2_sqrdcmlah_zzzz_s, TCG_CALL_NO_RWG,
                    void, ptr, ptr, ptr, ptr, i32)
 DEF_HELPER_FLAGS_5(sve2_sqrdcmlah_zzzz_d, TCG_CALL_NO_RWG,
                    void, ptr, ptr, ptr, ptr, i32)
+
+DEF_HELPER_FLAGS_3(sve2_aesmc, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
+DEF_HELPER_FLAGS_3(sve2_aesimc, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
diff --git a/target/arm/sve.decode b/target/arm/sve.decode
index 3a2a4a7f1c..a83420e690 100644
--- a/target/arm/sve.decode
+++ b/target/arm/sve.decode
@@ -92,6 +92,10 @@
 # Named instruction formats.  These are generally used to
 # reduce the amount of duplication between instruction patterns.
 
+# One operand with unused vector element size
+@rdn_e0         ........ .. ........... . ..... rd:5 \
+                &rr_esz rn=%reg_movprfx esz=0
+
 # Two operand with unused vector element size
 @pd_pn_e0       ........ ........ ....... rn:4 . rd:4           &rr_esz esz=0
 
@@ -1387,3 +1391,9 @@ UMLSLT_zzzw     01000100 .. 0 ..... 010 111 ..... .....  
@rda_rn_rm
 
 CMLA_zzzz       01000100 esz:2 0 rm:5 0010 rot:2 rn:5 rd:5  ra=%reg_movprfx
 SQRDCMLAH_zzzz  01000100 esz:2 0 rm:5 0011 rot:2 rn:5 rd:5  ra=%reg_movprfx
+
+#### SVE2 Crypto Extensions
+
+## SVE2 crypto unary operations
+AESMC           01000101 00 10000011100 0 00000 .....   @rdn_e0
+AESIMC          01000101 00 10000011100 1 00000 .....   @rdn_e0
diff --git a/target/arm/sve_helper.c b/target/arm/sve_helper.c
index 55e2c32f03..f25bb5338d 100644
--- a/target/arm/sve_helper.c
+++ b/target/arm/sve_helper.c
@@ -7428,3 +7428,16 @@ void HELPER(sve2_xar_s)(void *vd, void *vn, void *vm, 
uint32_t desc)
         d[i] = ror32(n[i] ^ m[i], shr);
     }
 }
+
+#define DO_CRYPTO_AESMC(NAME, DECRYPT)                          \
+void HELPER(NAME)(void *vd, void *vn, uint32_t desc)            \
+{                                                               \
+    intptr_t i, opr_sz = simd_oprsz(desc);                      \
+    void *d = vd, *n = vn;                                      \
+    for (i = 0; i < opr_sz; i += 16) {                          \
+        HELPER(crypto_aesmc)(vd + i, vn + i, DECRYPT);          \
+    }
+}
+
+DO_CRYPTO_AESMC(sve2_aesmc, 0);
+DO_CRYPTO_AESMC(sve2_aesimc, 1);
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 20eb588cb3..03463308ca 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -7882,3 +7882,21 @@ static bool trans_SQRDCMLAH_zzzz(DisasContext *s, 
arg_CMLA_zzzz *a)
     };
     return do_sve2_zzzz_fn(s, a->rd, a->rn, a->rm, a->ra, fns[a->esz], a->rot);
 }
+
+#define DO_SVE2_AES_CRYPTO(NAME, name)                                  \
+static bool trans_##NAME(DisasContext *s, arg_rr_esz *a)                \
+{                                                                       \
+    if (!dc_isar_feature(aa64_sve2_aes, s)) {                           \
+        return false;                                                   \
+    }                                                                   \
+    if (sve_access_check(s)) {                                          \
+        unsigned vsz = vec_full_reg_size(s);                            \
+        tcg_gen_gvec_2_ool(vec_full_reg_offset(s, a->rd),               \
+                           vec_full_reg_offset(s, a->rn),               \
+                           vsz, vsz, 0, gen_helper_sve2_##name);        \
+    }                                                                   \
+    return true;                                                        \
+}
+
+DO_SVE2_AES_CRYPTO(AESMC, aesmc)
+DO_SVE2_AES_CRYPTO(AESIMC, aesimc)
-- 
2.17.1