[PATCH 2/2] target/arm: Fail on invalid size for VMUL (float)

[Fredrik Strupe]

Bit 1 of VMUL (float)'s size field encodes the opcode and must be 0,
with 1 making it undefined. Thus, make VMUL (float) instructions
with size=0b10 or size=0b11 (size >= 2) undefined.

(U is 1 for VMUL, while it is 0 for VMLA/VMLS.)

Signed-off-by: Fredrik Strupe <address@hidden>
---
 target/arm/translate.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/target/arm/translate.c b/target/arm/translate.c
index dfe9dbbcfd..4268eed9b7 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -5237,6 +5237,11 @@ static int disas_neon_data_insn(DisasContext *s, 
uint32_t insn)
         }
         case NEON_3R_FLOAT_MULTIPLY:
         {
+            /* Size bit 1 of VMUL (float) encodes the op and must be 0 */
+            if (u && size >= 2)  {
+                return 1;
+            }
+
             TCGv_ptr fpstatus = get_fpstatus_ptr(1);
             gen_helper_vfp_muls(tmp, tmp, tmp2, fpstatus);
             if (!u) {
-- 
2.20.1