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Re: [PATCH v4 6/7] target/arm: Honor the HCR_EL2.TPU bit
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From: |
Peter Maydell |
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Subject: |
Re: [PATCH v4 6/7] target/arm: Honor the HCR_EL2.TPU bit |
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Date: |
Fri, 28 Feb 2020 16:25:54 +0000 |
On Tue, 25 Feb 2020 at 18:08, Richard Henderson
<address@hidden> wrote:
>
> This bit traps EL1 access to cache maintenance insns that operate
> to the point of unification. There are no longer any references to
> plain aa64_cacheop_access, so remove it.
>
> Signed-off-by: Richard Henderson <address@hidden>
> ---
> v4: Fix el0 fallthru (pmm).
> ---
Reviewed-by: Peter Maydell <address@hidden>
thanks
-- PMM
- [PATCH v4 0/7] target/arm: Honor more HCR_EL2 traps, Richard Henderson, 2020/02/25
- [PATCH v4 1/7] target/arm: Improve masking of HCR RES0 bits, Richard Henderson, 2020/02/25
- [PATCH v4 2/7] target/arm: Honor the HCR_EL2.{TVM,TRVM} bits, Richard Henderson, 2020/02/25
- [PATCH v4 3/7] target/arm: Honor the HCR_EL2.TSW bit, Richard Henderson, 2020/02/25
- [PATCH v4 4/7] target/arm: Honor the HCR_EL2.TACR bit, Richard Henderson, 2020/02/25
- [PATCH v4 5/7] target/arm: Honor the HCR_EL2.TPCP bit, Richard Henderson, 2020/02/25
- [PATCH v4 6/7] target/arm: Honor the HCR_EL2.TPU bit, Richard Henderson, 2020/02/25
- Re: [PATCH v4 6/7] target/arm: Honor the HCR_EL2.TPU bit,
Peter Maydell <=
- [PATCH v4 7/7] target/arm: Honor the HCR_EL2.TTLB bit, Richard Henderson, 2020/02/25