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[PATCH 1/3] arm_gic: Mask the un-supported priority bits
From: |
Sai Pavan Boddu |
Subject: |
[PATCH 1/3] arm_gic: Mask the un-supported priority bits |
Date: |
Fri, 14 Feb 2020 18:46:50 +0530 |
Priority bits implemented in arm-gic can 8 to 4, un-implemented bits
are read as zeros(RAZ).
Signed-off-by: Sai Pavan Boddu <address@hidden>
---
hw/intc/arm_gic.c | 9 ++++++---
hw/intc/arm_gic_common.c | 1 +
include/hw/intc/arm_gic_common.h | 1 +
3 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
index 1d7da7b..8875330 100644
--- a/hw/intc/arm_gic.c
+++ b/hw/intc/arm_gic.c
@@ -43,6 +43,9 @@
} \
} while (0)
+#define UMASK(n) \
+ ((((1 << n) - 1) << (8 - n)) & 0xFF)
+
static const uint8_t gic_id_11mpcore[] = {
0x00, 0x00, 0x00, 0x00, 0x90, 0x13, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1
};
@@ -652,9 +655,9 @@ void gic_dist_set_priority(GICState *s, int cpu, int irq,
uint8_t val,
}
if (irq < GIC_INTERNAL) {
- s->priority1[irq][cpu] = val;
+ s->priority1[irq][cpu] = val & UMASK(s->n_prio_bits) ;
} else {
- s->priority2[(irq) - GIC_INTERNAL] = val;
+ s->priority2[(irq) - GIC_INTERNAL] = val & UMASK(s->n_prio_bits);
}
}
@@ -684,7 +687,7 @@ static void gic_set_priority_mask(GICState *s, int cpu,
uint8_t pmask,
return;
}
}
- s->priority_mask[cpu] = pmask;
+ s->priority_mask[cpu] = pmask & UMASK(s->n_prio_bits);
}
static uint32_t gic_get_priority_mask(GICState *s, int cpu, MemTxAttrs attrs)
diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c
index e6c4fe7..e4668c7 100644
--- a/hw/intc/arm_gic_common.c
+++ b/hw/intc/arm_gic_common.c
@@ -357,6 +357,7 @@ static Property arm_gic_common_properties[] = {
DEFINE_PROP_BOOL("has-security-extensions", GICState, security_extn, 0),
/* True if the GIC should implement the virtualization extensions */
DEFINE_PROP_BOOL("has-virtualization-extensions", GICState, virt_extn, 0),
+ DEFINE_PROP_UINT32("num-prio-bits", GICState, n_prio_bits, 8),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/include/hw/intc/arm_gic_common.h b/include/hw/intc/arm_gic_common.h
index b5585fe..6e0d6b8 100644
--- a/include/hw/intc/arm_gic_common.h
+++ b/include/hw/intc/arm_gic_common.h
@@ -96,6 +96,7 @@ typedef struct GICState {
uint16_t priority_mask[GIC_NCPU_VCPU];
uint16_t running_priority[GIC_NCPU_VCPU];
uint16_t current_pending[GIC_NCPU_VCPU];
+ uint32_t n_prio_bits;
/* If we present the GICv2 without security extensions to a guest,
* the guest can configure the GICC_CTLR to configure group 1 binary point
--
2.7.4