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Re: [Qemu-arm] [PATCH 10/67] target/arm: Move test for AL into arm_skip_
From: |
Peter Maydell |
Subject: |
Re: [Qemu-arm] [PATCH 10/67] target/arm: Move test for AL into arm_skip_unless |
Date: |
Tue, 30 Jul 2019 09:49:25 +0100 |
On Tue, 30 Jul 2019 at 01:57, Richard Henderson
<address@hidden> wrote:
>
> On 7/29/19 7:32 AM, Peter Maydell wrote:
> > On Fri, 26 Jul 2019 at 18:50, Richard Henderson
> > <address@hidden> wrote:
> >>
> >> We will shortly be calling this function much more often.
> >>
> >> Signed-off-by: Richard Henderson <address@hidden>
> >> ---
> >
> > In the other callsites for arm_skip_unless() the cond argument
> > can never be 0xe or 0xf.
> >
> > Reviewed-by: Peter Maydell <address@hidden>
>
> In my original version I included cond in the fields collected by decodetree,
> and so every single trans_* function called arm_skip_unless, so that would not
> be the case there.
That remark was more a note about why the change is ok and doesn't
change behaviour for the other callsites that the patch doesn't touch.
(It's the kind of thing it's helpful to note in a commit message to
show that you've thought about it.)
> I discarded that in the version posted here, but I still think it might be a
> cleaner design overall.
>
> In the short term, maybe I should just discard this patch?
I don't have a strong opinion either way. Putting the cond check
inside the function seems cleaner even if we're only calling it in
a few places, I think.
thanks
-- PMM
- [Qemu-arm] [PATCH 07/67] target/arm: Introduce add_reg_for_lit, (continued)
- [Qemu-arm] [PATCH 15/67] target/arm: Convert Saturating addition and subtraction, Richard Henderson, 2019/07/26
- [Qemu-arm] [PATCH 16/67] target/arm: Convert Halfword multiply and multiply accumulate, Richard Henderson, 2019/07/26
- [Qemu-arm] [PATCH 14/67] target/arm: Convert multiply and multiply accumulate, Richard Henderson, 2019/07/26
- [Qemu-arm] [PATCH 17/67] target/arm: Convert MSR (immediate) and hints, Richard Henderson, 2019/07/26
- [Qemu-arm] [PATCH 20/67] target/arm: Convert the rest of A32 Miscelaneous instructions, Richard Henderson, 2019/07/26
- [Qemu-arm] [PATCH 18/67] target/arm: Convert MRS/MSR (banked, register), Richard Henderson, 2019/07/26
- [Qemu-arm] [PATCH 21/67] target/arm: Convert T32 ADDW/SUBW, Richard Henderson, 2019/07/26
- [Qemu-arm] [PATCH 13/67] target/arm: Convert Data Processing (reg, reg-shifted-reg, imm), Richard Henderson, 2019/07/26