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[Qemu-arm] [PATCH v3 0/3] Add Aspeed GPIO controller model
From: |
Rashmica Gupta |
Subject: |
[Qemu-arm] [PATCH v3 0/3] Add Aspeed GPIO controller model |
Date: |
Tue, 30 Jul 2019 15:44:58 +1000 |
There are a couple of things I'm not confident about here:
- what should be in init vs realize?
- should the irq state be in vmstate?
- is there a better way to do composition of classes (patch 3)?
v3:
- didn't have each gpio set up as an irq
- now can't access set AC on ast2400 (only exists on ast2500)
- added ast2600 implementation (patch 3)
- renamed a couple of variables for clarity
v2: Addressed Andrew's feedback, added debounce regs, renamed get/set to
read/write to minimise confusion with a 'set' of registers.
Rashmica Gupta (3):
hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500
aspeed: add a GPIO controller to the SoC
hw/gpio: Add in AST2600 specific implementation
hw/arm/aspeed_soc.c | 17 +
hw/gpio/Makefile.objs | 1 +
hw/gpio/aspeed_gpio.c | 1103 +++++++++++++++++++++++++++++++++
include/hw/arm/aspeed_soc.h | 3 +
include/hw/gpio/aspeed_gpio.h | 91 +++
5 files changed, 1215 insertions(+)
create mode 100644 hw/gpio/aspeed_gpio.c
create mode 100644 include/hw/gpio/aspeed_gpio.h
--
2.20.1
- [Qemu-arm] [PATCH v3 0/3] Add Aspeed GPIO controller model,
Rashmica Gupta <=