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[Qemu-arm] [PATCH 12/67] target/arm: Introduce gen_illegal_op


From: Richard Henderson
Subject: [Qemu-arm] [PATCH 12/67] target/arm: Introduce gen_illegal_op
Date: Fri, 26 Jul 2019 10:49:37 -0700

Unify the code sequence for generating an illegal opcode exception.

Signed-off-by: Richard Henderson <address@hidden>
---
 target/arm/translate-vfp.inc.c |  3 +--
 target/arm/translate.c         | 21 +++++++++++----------
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/target/arm/translate-vfp.inc.c b/target/arm/translate-vfp.inc.c
index 4066b2febf..1b08930649 100644
--- a/target/arm/translate-vfp.inc.c
+++ b/target/arm/translate-vfp.inc.c
@@ -108,8 +108,7 @@ static bool full_vfp_access_check(DisasContext *s, bool 
ignore_vfp_enabled)
 
     if (!s->vfp_enabled && !ignore_vfp_enabled) {
         assert(!arm_dc_feature(s, ARM_FEATURE_M));
-        gen_exception_insn(s, EXCP_UDEF, syn_uncategorized(),
-                           default_exception_el(s));
+        gen_illegal_op(s);
         return false;
     }
 
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 4738b91957..0f21ee9ce7 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -1279,6 +1279,12 @@ static void gen_exception_bkpt_insn(DisasContext *s, 
uint32_t syn)
     s->base.is_jmp = DISAS_NORETURN;
 }
 
+static void gen_illegal_op(DisasContext *s)
+{
+    gen_exception_insn(s, EXCP_UDEF, syn_uncategorized(),
+                       default_exception_el(s));
+}
+
 /* Force a TB lookup after an instruction that changes the CPU state.  */
 static inline void gen_lookup_tb(DisasContext *s)
 {
@@ -1309,8 +1315,7 @@ static inline void gen_hlt(DisasContext *s, int imm)
         return;
     }
 
-    gen_exception_insn(s, EXCP_UDEF, syn_uncategorized(),
-                       default_exception_el(s));
+    gen_illegal_op(s);
 }
 
 static inline void gen_add_data_offset(DisasContext *s, unsigned int insn,
@@ -7631,8 +7636,7 @@ static void gen_srs(DisasContext *s,
     }
 
     if (undef) {
-        gen_exception_insn(s, EXCP_UDEF, syn_uncategorized(),
-                           default_exception_el(s));
+        gen_illegal_op(s);
         return;
     }
 
@@ -9299,8 +9303,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int 
insn)
             break;
         default:
         illegal_op:
-            gen_exception_insn(s, EXCP_UDEF, syn_uncategorized(),
-                               default_exception_el(s));
+            gen_illegal_op(s);
             break;
         }
     }
@@ -10990,8 +10993,7 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t 
insn)
     }
     return;
 illegal_op:
-    gen_exception_insn(s, EXCP_UDEF, syn_uncategorized(),
-                       default_exception_el(s));
+    gen_illegal_op(s);
 }
 
 static void disas_thumb_insn(DisasContext *s, uint32_t insn)
@@ -11816,8 +11818,7 @@ static void disas_thumb_insn(DisasContext *s, uint32_t 
insn)
     return;
 illegal_op:
 undef:
-    gen_exception_insn(s, EXCP_UDEF, syn_uncategorized(),
-                       default_exception_el(s));
+    gen_illegal_op(s);
 }
 
 static bool insn_crosses_page(CPUARMState *env, DisasContext *s)
-- 
2.17.1




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