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[Qemu-arm] [PATCH v3 11/27] target/arm: Declare get_phys_addr() function
From: |
Philippe Mathieu-Daudé |
Subject: |
[Qemu-arm] [PATCH v3 11/27] target/arm: Declare get_phys_addr() function publicly |
Date: |
Mon, 1 Jul 2019 15:25:00 +0200 |
In the next commit we will split the TLB related routines of
this file, and this function will also be called in the new
file. Declare it in the "internals.h" header.
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
---
target/arm/helper.c | 21 +++++----------------
target/arm/internals.h | 16 ++++++++++++++++
2 files changed, 21 insertions(+), 16 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index a87fda9191..063f4778e0 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -33,17 +33,6 @@
#define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */
#ifndef CONFIG_USER_ONLY
-/* Cacheability and shareability attributes for a memory access */
-typedef struct ARMCacheAttrs {
- unsigned int attrs:8; /* as in the MAIR register encoding */
- unsigned int shareability:2; /* as in the SH field of the VMSAv8-64 PTEs */
-} ARMCacheAttrs;
-
-static bool get_phys_addr(CPUARMState *env, target_ulong address,
- MMUAccessType access_type, ARMMMUIdx mmu_idx,
- hwaddr *phys_ptr, MemTxAttrs *attrs, int *prot,
- target_ulong *page_size,
- ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheattrs);
static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
MMUAccessType access_type, ARMMMUIdx mmu_idx,
@@ -12639,11 +12628,11 @@ static ARMCacheAttrs combine_cacheattrs(ARMCacheAttrs
s1, ARMCacheAttrs s2)
* @fi: set to fault info if the translation fails
* @cacheattrs: (if non-NULL) set to the cacheability/shareability attributes
*/
-static bool get_phys_addr(CPUARMState *env, target_ulong address,
- MMUAccessType access_type, ARMMMUIdx mmu_idx,
- hwaddr *phys_ptr, MemTxAttrs *attrs, int *prot,
- target_ulong *page_size,
- ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheattrs)
+bool get_phys_addr(CPUARMState *env, target_ulong address,
+ MMUAccessType access_type, ARMMMUIdx mmu_idx,
+ hwaddr *phys_ptr, MemTxAttrs *attrs, int *prot,
+ target_ulong *page_size,
+ ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheattrs)
{
if (mmu_idx == ARMMMUIdx_S12NSE0 || mmu_idx == ARMMMUIdx_S12NSE1) {
/* Call ourselves recursively to do the stage 1 and then stage 2
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 5a02f458f3..ff5ab0328e 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -985,4 +985,20 @@ static inline int exception_target_el(CPUARMState *env)
return target_el;
}
+#ifndef CONFIG_USER_ONLY
+
+/* Cacheability and shareability attributes for a memory access */
+typedef struct ARMCacheAttrs {
+ unsigned int attrs:8; /* as in the MAIR register encoding */
+ unsigned int shareability:2; /* as in the SH field of the VMSAv8-64 PTEs */
+} ARMCacheAttrs;
+
+bool get_phys_addr(CPUARMState *env, target_ulong address,
+ MMUAccessType access_type, ARMMMUIdx mmu_idx,
+ hwaddr *phys_ptr, MemTxAttrs *attrs, int *prot,
+ target_ulong *page_size,
+ ARMMMUFaultInfo *fi, ARMCacheAttrs *cacheattrs);
+
+#endif /* !CONFIG_USER_ONLY */
+
#endif
--
2.20.1
- [Qemu-arm] [PATCH v3 00/27] Support disabling TCG on ARM, Philippe Mathieu-Daudé, 2019/07/01
- [Qemu-arm] [PATCH v3 02/27] target/arm: Makefile cleanup (ARM), Philippe Mathieu-Daudé, 2019/07/01
- [Qemu-arm] [PATCH v3 01/27] target/arm: Makefile cleanup (Aarch64), Philippe Mathieu-Daudé, 2019/07/01
- [Qemu-arm] [PATCH v3 03/27] target/arm: Makefile cleanup (KVM), Philippe Mathieu-Daudé, 2019/07/01
- [Qemu-arm] [PATCH v3 04/27] target/arm: Makefile cleanup (softmmu), Philippe Mathieu-Daudé, 2019/07/01
- [Qemu-arm] [PATCH v3 05/27] target/arm: Add copyright boilerplate, Philippe Mathieu-Daudé, 2019/07/01
- [Qemu-arm] [PATCH v3 06/27] target/arm/helper: Remove unused include, Philippe Mathieu-Daudé, 2019/07/01
- [Qemu-arm] [PATCH v3 07/27] target/arm: Fix multiline comment syntax, Philippe Mathieu-Daudé, 2019/07/01
- [Qemu-arm] [PATCH v3 08/27] target/arm: Fix coding style issues, Philippe Mathieu-Daudé, 2019/07/01
- [Qemu-arm] [PATCH v3 11/27] target/arm: Declare get_phys_addr() function publicly,
Philippe Mathieu-Daudé <=
- [Qemu-arm] [PATCH v3 09/27] target/arm: Move the DC ZVA helper into op_helper, Philippe Mathieu-Daudé, 2019/07/01
- [Qemu-arm] [PATCH v3 10/27] target/arm: Move CPU state dumping routines to cpu.c, Philippe Mathieu-Daudé, 2019/07/01
- [Qemu-arm] [PATCH v3 12/27] target/arm: Move TLB related routines to tlb_helper.c, Philippe Mathieu-Daudé, 2019/07/01
- [Qemu-arm] [PATCH v3 14/27] target/arm/vfp_helper: Move code around, Philippe Mathieu-Daudé, 2019/07/01
- [Qemu-arm] [PATCH v3 13/27] target/arm: Move debug routines to debug_helper.c, Philippe Mathieu-Daudé, 2019/07/01
- [Qemu-arm] [PATCH v3 15/27] target/arm/vfp_helper: Extract vfp_set_fpscr_to_host(), Philippe Mathieu-Daudé, 2019/07/01
- [Qemu-arm] [PATCH v3 19/27] target/arm: Restrict PSCI to TCG, Philippe Mathieu-Daudé, 2019/07/01
- [Qemu-arm] [PATCH v3 20/27] target/arm: Declare arm_log_exception() function publicly, Philippe Mathieu-Daudé, 2019/07/01
- [Qemu-arm] [PATCH v3 17/27] target/arm/vfp_helper: Restrict the SoftFloat use to TCG, Philippe Mathieu-Daudé, 2019/07/01