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From: | Richard Henderson |
Subject: | Re: [Qemu-arm] [Qemu-devel] [PATCH 17/23] hw/arm/armsse: Add unimplemented-device stub for cache control registers |
Date: | Mon, 28 Jan 2019 08:24:15 -0800 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 |
On 1/21/19 10:51 AM, Peter Maydell wrote: > The SSE-200 gives each CPU a register bank to use to control its > L1 instruction cache. Put in an unimplemented-device stub for this. > > Signed-off-by: Peter Maydell <address@hidden> > --- > include/hw/arm/armsse.h | 1 + > hw/arm/armsse.c | 39 ++++++++++++++++++++++++++++++++++++++- > 2 files changed, 39 insertions(+), 1 deletion(-) Reviewed-by: Richard Henderson <address@hidden> r~
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