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[Qemu-arm] [PATCH 0/7] target/arm: Fix various underdecodings
From: |
Peter Maydell |
Subject: |
[Qemu-arm] [PATCH 0/7] target/arm: Fix various underdecodings |
Date: |
Fri, 25 Jan 2019 18:26:19 +0000 |
This patchset fixes the various cases of underdecoded instructions
that Laurent spotted and sent a bug report for. (The exception
is "missing default in disas_data_proc_1src", which got fixed in
commit 18de2813c35e359621a.)
thanks
-- PMM
Peter Maydell (7):
target/arm/translate-a64: Don't underdecode system instructions
target/arm/translate-a64: Don't underdecode PRFM
target/arm/translate-a64: Don't underdecode SIMD ld/st multiple
target/arm/translate-a64: Don't underdecode SIMD ld/st single
target/arm/translate-a64: Don't underdecode add/sub extended register
target/arm/translate-a64: Don't underdecode FP insns
target/arm/translate-a64: Don't underdecode SDOT and UDOT
target/arm/translate-a64.c | 53 +++++++++++++++++++++++++++++++++-----
1 file changed, 46 insertions(+), 7 deletions(-)
--
2.20.1
- [Qemu-arm] [PATCH 0/7] target/arm: Fix various underdecodings,
Peter Maydell <=
- [Qemu-arm] [PATCH 4/7] target/arm/translate-a64: Don't underdecode SIMD ld/st single, Peter Maydell, 2019/01/25
- [Qemu-arm] [PATCH 1/7] target/arm/translate-a64: Don't underdecode system instructions, Peter Maydell, 2019/01/25
- [Qemu-arm] [PATCH 3/7] target/arm/translate-a64: Don't underdecode SIMD ld/st multiple, Peter Maydell, 2019/01/25
- [Qemu-arm] [PATCH 6/7] target/arm/translate-a64: Don't underdecode FP insns, Peter Maydell, 2019/01/25
- [Qemu-arm] [PATCH 5/7] target/arm/translate-a64: Don't underdecode add/sub extended register, Peter Maydell, 2019/01/25