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Re: [Qemu-arm] [Qemu-devel] [PATCH 01/23] armv7m: Don't assume the NVIC'
From: |
Richard Henderson |
Subject: |
Re: [Qemu-arm] [Qemu-devel] [PATCH 01/23] armv7m: Don't assume the NVIC's CPU is CPU 0 |
Date: |
Wed, 23 Jan 2019 15:44:04 -0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 |
On 1/21/19 10:50 AM, Peter Maydell wrote:
> Currently the ARMv7M NVIC object's realize method assumes that the
> CPU the NVIC is attached to is CPU 0, because it thinks there can
> only ever be one CPU in the system. To allow a dual-Cortex-M33
> setup we need to remove this assumption; instead the armv7m
> wrapper object tells the NVIC its CPU, in the same way that it
> already tells the CPU what the NVIC is.
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> hw/arm/armv7m.c | 6 ++++--
> hw/intc/armv7m_nvic.c | 3 +--
> 2 files changed, 5 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson <address@hidden>
r~
- [Qemu-arm] [PATCH 00/23] arm: Implement MPS2 AN521 FPGA image, Peter Maydell, 2019/01/21
- [Qemu-arm] [PATCH 02/23] armv7m: Make cpu object a child of the armv7m container, Peter Maydell, 2019/01/21
- [Qemu-arm] [PATCH 01/23] armv7m: Don't assume the NVIC's CPU is CPU 0, Peter Maydell, 2019/01/21
- [Qemu-arm] [PATCH 03/23] armv7m: Pass through start-powered-off CPU property, Peter Maydell, 2019/01/21
- [Qemu-arm] [PATCH 04/23] hw/arm/iotkit: Rename IoTKit to ARMSSE, Peter Maydell, 2019/01/21
- [Qemu-arm] [PATCH 23/23] hw/arm/mps2-tz: Add mps2-an521 model, Peter Maydell, 2019/01/21
- [Qemu-arm] [PATCH 22/23] hw/arm/mps2-tz: Add IRQ infrastructure to support SSE-200, Peter Maydell, 2019/01/21
- [Qemu-arm] [PATCH 19/23] hw/misc/armsse-cpuid: Implement SSE-200 CPU_IDENTITY register block, Peter Maydell, 2019/01/21