[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-arm] [PATCH 11/11] aspeed/smc: Add dummy data register
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [Qemu-arm] [PATCH 11/11] aspeed/smc: Add dummy data register |
Date: |
Fri, 7 Sep 2018 20:02:53 -0300 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.0 |
On 8/31/18 8:15 AM, Cédric Le Goater wrote:
> The SMC controllers have a register containing the byte that will be
> used as dummy output. It can be modified by software.
>
> Signed-off-by: Cédric Le Goater <address@hidden>
> ---
> hw/ssi/aspeed_smc.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
> index da2fedfcd3cd..f31bbc895caa 100644
> --- a/hw/ssi/aspeed_smc.c
> +++ b/hw/ssi/aspeed_smc.c
> @@ -102,8 +102,8 @@
> /* Misc Control Register #1 */
> #define R_MISC_CTRL1 (0x50 / 4)
>
> -/* Misc Control Register #2 */
> -#define R_MISC_CTRL2 (0x54 / 4)
> +/* SPI dummy cycle data */
> +#define R_DUMMY_DATA (0x54 / 4)
>
> /* DMA Control/Status Register */
> #define R_DMA_CTRL (0x80 / 4)
> @@ -548,7 +548,7 @@ static void aspeed_smc_flash_setup(AspeedSMCFlash *fl,
> uint32_t addr)
> */
> if (aspeed_smc_flash_mode(fl) == CTRL_FREADMODE) {
> for (i = 0; i < aspeed_smc_flash_dummies(fl); i++) {
> - ssi_transfer(fl->controller->spi, 0xFF);
> + ssi_transfer(fl->controller->spi, s->regs[R_DUMMY_DATA] & 0xff);
The DUMMY_DATA register always contains a 8-bit value, so this AND
shouldn't be necessary. Regardless:
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
> }
> }
> }
> @@ -680,6 +680,7 @@ static uint64_t aspeed_smc_read(void *opaque, hwaddr
> addr, unsigned int size)
> addr == s->r_timings ||
> addr == s->r_ce_ctrl ||
> addr == R_INTR_CTRL ||
> + addr == R_DUMMY_DATA ||
> (s->ctrl->has_dma && addr == R_DMA_CTRL) ||
> (s->ctrl->has_dma && addr == R_DMA_FLASH_ADDR) ||
> (s->ctrl->has_dma && addr == R_DMA_DRAM_ADDR) ||
> @@ -912,6 +913,8 @@ static void aspeed_smc_write(void *opaque, hwaddr addr,
> uint64_t data,
> }
> } else if (addr == R_INTR_CTRL) {
> s->regs[addr] = value;
> + } else if (addr == R_DUMMY_DATA) {
> + s->regs[addr] = value & 0xff ;
> } else if (s->ctrl->has_dma && addr == R_DMA_CTRL) {
> aspeed_smc_dma_ctrl(s, value);
> } else if (s->ctrl->has_dma && addr == R_DMA_DRAM_ADDR) {
>
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- Re: [Qemu-arm] [PATCH 11/11] aspeed/smc: Add dummy data register,
Philippe Mathieu-Daudé <=