[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-arm] [PATCH v3 7/7] Add QTest testcase for the Intel Hexadecim
From: |
Su Hang |
Subject: |
Re: [Qemu-arm] [PATCH v3 7/7] Add QTest testcase for the Intel Hexadecimal |
Date: |
Sat, 28 Jul 2018 07:58:17 +0800 (GMT+08:00) |
> > +#define BIN_SIZE 146
> > +
> > +static unsigned char pre_store[BIN_SIZE] = {
> > + 4, 208, 159, 229, 22, 0, 0, 235, 254, 255, 255, 234, 152, 16,
> > 1,
> > + 0, 4, 176, 45, 229, 0, 176, 141, 226, 12, 208, 77, 226, 8,
> > 0,
> > + 11, 229, 6, 0, 0, 234, 8, 48, 27, 229, 0, 32, 211, 229,
> > 44,
> > + 48, 159, 229, 0, 32, 131, 229, 8, 48, 27, 229, 1, 48, 131,
> > 226,
> > + 8, 48, 11, 229, 8, 48, 27, 229, 0, 48, 211, 229, 0, 0,
> > 83,
> > + 227, 244, 255, 255, 26, 0, 0, 160, 225, 0, 208, 139, 226, 4,
> > 176,
> > + 157, 228, 30, 255, 47, 225, 0, 16, 31, 16, 0, 72, 45, 233,
> > 4,
> > + 176, 141, 226, 8, 0, 159, 229, 230, 255, 255, 235, 0, 0, 160,
> > 225,
> > + 0, 136, 189, 232, 132, 0, 1, 0, 0, 16, 31, 16, 72, 101,
> > 108,
> > + 108, 111, 32, 119, 111, 114, 108, 100, 33, 10, 0};
>
> Can this be:
>
> 0x04, 0xd0, 0x9f, 0xe5, 0x16, 0x00, 0x00, 0xeb, 0xfe, 0xff, 0xff,
> 0xea,
> 0x98, 0x10, 0x01, 0x00, 0x04, 0xb0, 0x2d, 0xe5, 0x00, 0xb0, 0x8d,
> 0xe2,
> 0x0c, 0xd0, 0x4d, 0xe2, 0x08, 0x00, 0x0b, 0xe5, 0x06, 0x00, 0x00,
> 0xea,
> 0x08, 0x30, 0x1b, 0xe5, 0x00, 0x20, 0xd3, 0xe5, 0x2c, 0x30, 0x9f,
> 0xe5,
> 0x00, 0x20, 0x83, 0xe5, 0x08, 0x30, 0x1b, 0xe5, 0x01, 0x30, 0x83,
> 0xe2,
> 0x08, 0x30, 0x0b, 0xe5, 0x08, 0x30, 0x1b, 0xe5, 0x00, 0x30, 0xd3,
> 0xe5,
> 0x00, 0x00, 0x53, 0xe3, 0xf4, 0xff, 0xff, 0x1a, 0x00, 0x00, 0xa0,
> 0xe1,
> 0x00, 0xd0, 0x8b, 0xe2, 0x04, 0xb0, 0x9d, 0xe4, 0x1e, 0xff, 0x2f,
> 0xe1,
> 0x00, 0x10, 0x1f, 0x10, 0x00, 0x48, 0x2d, 0xe9, 0x04, 0xb0, 0x8d,
> 0xe2,
> 0x08, 0x00, 0x9f, 0xe5, 0xe6, 0xff, 0xff, 0xeb, 0x00, 0x00, 0xa0,
> 0xe1,
> 0x00, 0x88, 0xbd, 0xe8, 0x84, 0x00, 0x01, 0x00, 0x00, 0x10, 0x1f,
> 0x10,
> 'H', 'e', 'l', 'l', 'o', ' ', 'w', 'o', 'r', 'l', 'd', '!',
> '\n', '\0'
> };
>
> ?
Yes, good suggestion. Your version is clearer and more readable for humans.
Best,
Su Hang
- [Qemu-arm] [PATCH v3 2/7] hw/arm: rename TYPE_ARMV7M to TYPE_ARM_M_PROFILE, (continued)
- [Qemu-arm] [PATCH v3 2/7] hw/arm: rename TYPE_ARMV7M to TYPE_ARM_M_PROFILE, Stefan Hajnoczi, 2018/07/25
- [Qemu-arm] [PATCH v3 3/7] hw/arm: make bitbanded IO optional on ARM M Profile, Stefan Hajnoczi, 2018/07/25
- [Qemu-arm] [PATCH v3 4/7] target/arm: add "cortex-m0" CPU model, Stefan Hajnoczi, 2018/07/25
- [Qemu-arm] [PATCH v3 5/7] loader: add rom transaction API, Stefan Hajnoczi, 2018/07/25
- [Qemu-arm] [PATCH v3 6/7] loader: Implement .hex file loader, Stefan Hajnoczi, 2018/07/25
- [Qemu-arm] [PATCH v3 7/7] Add QTest testcase for the Intel Hexadecimal, Stefan Hajnoczi, 2018/07/25
- Re: [Qemu-arm] [Qemu-devel] [PATCH v3 0/7] arm: add Cortex M0 CPU model and hex file loader, Stefan Hajnoczi, 2018/07/25