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Re: [Qemu-arm] [PATCH] aspeed: Implement write-1-{set, clear} for AST250
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From: |
Peter Maydell |
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Subject: |
Re: [Qemu-arm] [PATCH] aspeed: Implement write-1-{set, clear} for AST2500 strapping |
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Date: |
Thu, 12 Jul 2018 16:58:37 +0100 |
On 9 July 2018 at 15:35, Andrew Jeffery <address@hidden> wrote:
> The AST2500 SoC family changes the runtime behaviour of the hardware
> strapping register (SCU70) to write-1-set/write-1-clear, with
> write-1-clear implemented on the "read-only" SoC revision register
> (SCU7C). For the the AST2400, the hardware strapping is
> runtime-configured with read-modify-write semantics.
>
> Signed-off-by: Andrew Jeffery <address@hidden>
> ---
Hi -- is this a bugfix suitable for 3.0, or something you'd
like to wait until 3.1 ? The commit message sounds like a bugfix...
thanks
-- PMM