qemu-arm
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-arm] [Qemu-devel] [PATCH 8/9] target/arm: Implement CAS and CA


From: Richard Henderson
Subject: Re: [Qemu-arm] [Qemu-devel] [PATCH 8/9] target/arm: Implement CAS and CASP
Date: Thu, 3 May 2018 10:32:32 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0

On 05/03/2018 07:55 AM, Peter Maydell wrote:
>> +        /* If compare equal, write back new data, else write back old data. 
>>  */
>> +        tcg_gen_movcond_i64(TCG_COND_NE, c1, c2, zero, t1, d1);
>> +        tcg_gen_movcond_i64(TCG_COND_NE, c2, c2, zero, t2, d2);
>> +        tcg_gen_qemu_st_i64(c1, addr, memidx, MO_64 | s->be_data);
>> +        tcg_gen_qemu_st_i64(c2, a2, memidx, MO_64 | s->be_data);
> 
> I think this has the wrong behaviour if you do a CASP-with-mismatched-value
> to read-only memory -- architecturally this should fail the comparison
> and return the memory value in registers, it's not allowed to do a
> memory write and take a data abort because the memory isn't writable.

If this is true, then we cannot use the x86 cmpxchg insn in the parallel case
either.  We will also have already raised an exception for a non-writable page;
that happens generically within ATOMIC_MMU_LOOKUP.  It is also how we implement
non-parallel cmpxchg in tcg-op.c.

I guess I was trying to read in some wiggle room in the clearing of exclusive
monitors and such.

I really don't see another way.  What do you want to do?


r~



reply via email to

[Prev in Thread] Current Thread [Next in Thread]