Re: [Qemu-arm] [PATCH 7/9] target/arm: Expand vector registers for SVE

[Richard Henderson]

On 01/12/2018 10:38 AM, Peter Maydell wrote:
>> -        long ofs = offsetof(CPUARMState, vfp.regs[reg >> 1]);
>> +        long r = offsetof(CPUARMState, vfp.zregs[reg >> 2].d[(reg >> 1) & 
>> 1]);
>>          if (reg & 1) {
>> -            ofs += offsetof(CPU_DoubleU, l.upper);
>> +            return r + offsetof(CPU_DoubleU, l.upper);
>>          } else {
>> -            ofs += offsetof(CPU_DoubleU, l.lower);
>> +            return r + offsetof(CPU_DoubleU, l.lower);
>>          }
>> -        return ofs;
> ...I see we're tweaking the logic on this code again. I was
> expecting that the changes in the previous patch would have turned
> out to be in support of just having to do a one-line change in this
> one, but apparently not ?
> 

I don't know why I changed my mind about where the return would go.  It should
have just been the one line change...

r~