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Re: [Qemu-arm] [Qemu-devel] [PATCH 18/20] target/arm: Implement BLXNS
From: |
Peter Maydell |
Subject: |
Re: [Qemu-arm] [Qemu-devel] [PATCH 18/20] target/arm: Implement BLXNS |
Date: |
Thu, 5 Oct 2017 20:40:40 +0100 |
On 5 October 2017 at 19:56, Richard Henderson
<address@hidden> wrote:
> On 09/22/2017 11:00 AM, Peter Maydell wrote:
>> +void HELPER(v7m_blxns)(CPUARMState *env, uint32_t dest)
>> +{
> ...
>> + if (dest & 1) {
>> + /* target is Secure, so this is just a normal BLX,
>> + * except that the low bit doesn't indicate Thumb/not.
>> + */
>> + env->regs[14] = nextinst;
>> + env->thumb = 1;
>> + env->regs[15] = dest & ~1;
>> + return;
>> + }
> ...
>> + switch_v7m_security_state(env, dest & 1);
>> + env->thumb = 1;
>> + env->regs[15] = dest & ~1;
>
> dest & 1 is known to be 0.
Yes. I liked the symmetry with the tail end of the v7m_bxns helper,
which is conceptually doing the same thing, and assumed the
compiler would be smart enough not to generate unnecessary code.
>> +static inline void gen_blxns(DisasContext *s, int rm)
>> +{
>> + TCGv_i32 var = load_reg(s, rm);
>> +
>> + /* We don't need to sync condexec state, for the same reason as blxns.
>
> s/blxns/bxns/ ?
Yes.
thanks
-- PMM