Re: [Qemu-arm] [Qemu-devel] [PATCH 08/20] target/arm: Make FAULTMASK register banked for v8M

[Richard Henderson]

On 08/22/2017 08:08 AM, Peter Maydell wrote:
> Make the FAULTMASK register banked if v8M security extensions are enabled.
> 
> Note that we do not yet implement the functionality of the new
> AIRCR.PRIS bit (which allows the effect of the NS copy of FAULTMASK to
> be restricted).
> 
> This patch includes the code to determine for v8M which copy
> of FAULTMASK should be updated on exception exit; further
> changes will be required to the exception exit code in general
> to support v8M, so this is just a small piece of that.
> 
> The v8M ARM ARM introduces a notation where individual paragraphs
> are labelled with R (for rule) or I (for information) followed
> by a random group of subscript letters. In comments where we want
> to refer to a particular part of the manual we use this convention,
> which should be more stable across document revisions than using
> section or page numbers.
> 
> Signed-off-by: Peter Maydell <address@hidden>
> ---
>  target/arm/cpu.h      | 14 ++++++++++++--
>  hw/intc/armv7m_nvic.c |  9 ++++++++-
>  target/arm/helper.c   | 20 ++++++++++++++++----
>  target/arm/machine.c  |  5 +++--
>  4 files changed, 39 insertions(+), 9 deletions(-)

Reviewed-by: Richard Henderson <address@hidden>


r~