[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-arm] [aarch64] how to get the value is stored by MSR insn
From: |
Sergey Smolov |
Subject: |
[Qemu-arm] [aarch64] how to get the value is stored by MSR insn |
Date: |
Wed, 17 May 2017 17:01:45 +0300 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:14.0) Gecko/20120713 Thunderbird/14.0 |
Hello, List!
I'm running an Aarch64 assembler program on QEMU. The program starts
from the following instructions:
movz x0, #0x50, LSL #0
msr vbar_el1, x0
My task is to print the value is stored into the vbar_el1 register to
the console (it should be equal to 0x50, I think).
Here is what I have in target/arm/translate-a64.c that is related to MSR
instruction simulation:
[code]
/* C5.6.129 MRS - move from system register
* C5.6.131 MSR (register) - move to system register
* C5.6.204 SYS
* C5.6.205 SYSL
* These are all essentially the same insn in 'read' and 'write'
* versions, with varying op0 fields.
*/
static void handle_sys(DisasContext *s, uint32_t insn, bool isread,
unsigned int op0, unsigned int op1, unsigned int
op2,
unsigned int crn, unsigned int crm, unsigned int rt)
{
....
if (isread) {
...
} else {
if (ri->type & ARM_CP_CONST) {
/* If not forbidden by access permissions, treat as WI */
return;
} else if (ri->writefn) {
qemu_log("is-writefn\n");
TCGv_ptr tmpptr;
tmpptr = tcg_const_ptr(ri);
gen_helper_set_cp_reg64(cpu_env, tmpptr, tcg_rt);
tcg_temp_free_ptr(tmpptr);
} else {
tcg_gen_st_i64(tcg_rt, cpu_env, ri->fieldoffset);
}
}
[code]
In my case the branch "else if (ri->writefn)" is executed. I've tried to
take the value that is stored to vbar_el1 from tcg_rt variable with the
help of GET_TCGV_I64 macro, but it returns the value (0x19) that is
different from the right one (0x50).
In what direction should I dig?
--
Sincerely yours,
Sergey Smolov
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- [Qemu-arm] [aarch64] how to get the value is stored by MSR insn,
Sergey Smolov <=