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Re: [Qemu-arm] [PATCH 03/10] armv7m: add state for v7M CCR, CFSR, HFSR,
From: |
Peter Maydell |
Subject: |
Re: [Qemu-arm] [PATCH 03/10] armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR |
Date: |
Fri, 27 Jan 2017 13:14:08 +0000 |
On 27 January 2017 at 12:28, Alex Bennée <address@hidden> wrote:
>
> Peter Maydell <address@hidden> writes:
>
>> Add the structure fields, VMState fields, reset code and macros for
>> the v7M system control registers CCR, CFSR, HFSR, DFSR, MMFAR and
>> BFAR.
>>
>> Signed-off-by: Peter Maydell <address@hidden>
>> ---
>> target/arm/cpu.h | 54
>> ++++++++++++++++++++++++++++++++++++++++++++++++++++
>> target/arm/cpu.c | 7 +++++++
>> target/arm/machine.c | 10 ++++++++--
>> 3 files changed, 69 insertions(+), 2 deletions(-)
>>
>> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
>> index b2cc329..4b062d2 100644
>> --- a/target/arm/cpu.h
>> +++ b/target/arm/cpu.h
>> @@ -21,6 +21,7 @@
>> #define ARM_CPU_H
>>
>> #include "kvm-consts.h"
>> +#include "hw/registerfields.h"
>>
>> #if defined(TARGET_AARCH64)
>> /* AArch64 definitions */
>> @@ -405,6 +406,12 @@ typedef struct CPUARMState {
>> uint32_t vecbase;
>> uint32_t basepri;
>> uint32_t control;
>> + uint32_t ccr; /* Configuration and Control */
>> + uint32_t cfsr; /* Configurable Fault Status */
>> + uint32_t hfsr; /* HardFault Status */
>> + uint32_t dfsr; /* Debug Fault Status Register */
>> + uint32_t mmfar; /* MemManage Fault Address */
>> + uint32_t bfar; /* BusFault Address */
>
> Given the CPUARMState needs to be accessed via env do we need to start
> getting concerned about its size?
We only care that accesses to the front of it are within easy
reach (specifically, accesses to fields via frequently used
TCG globals); it doesn't matter if more things are added at
the end.
thanks
-- PMM
- Re: [Qemu-arm] [PATCH 09/10] armv7m: FAULTMASK should be 0 on reset, (continued)
- [Qemu-arm] [PATCH 08/10] armv7m: Honour CCR.USERSETMPEND, Peter Maydell, 2017/01/24
- [Qemu-arm] [PATCH 05/10] armv7m: honour CCR.STACKALIGN on exception entry, Peter Maydell, 2017/01/24
- [Qemu-arm] [PATCH 10/10] armv7m: R14 should reset to 0xffffffff, Peter Maydell, 2017/01/24
- [Qemu-arm] [PATCH 03/10] armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR, Peter Maydell, 2017/01/24
- Re: [Qemu-arm] [PATCH 03/10] armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR, Alex Bennée, 2017/01/27
- Re: [Qemu-arm] [PATCH 03/10] armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR,
Peter Maydell <=
- [Qemu-arm] [PATCH 04/10] armv7m: implement CCR, CFSR, HFSR, DFSR, BFAR, and MMFAR, Peter Maydell, 2017/01/24
- [Qemu-arm] [PATCH 02/10] armv7m_nvic: keep a pointer to the CPU, Peter Maydell, 2017/01/24
- [Qemu-arm] [PATCH 06/10] armv7m: set CFSR.UNDEFINSTR on undefined instructions, Peter Maydell, 2017/01/24
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