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Re: [Qemu-arm] [PATCH 3/6] armv7m: Explicit error for bad vector table
From: |
Alex Bennée |
Subject: |
Re: [Qemu-arm] [PATCH 3/6] armv7m: Explicit error for bad vector table |
Date: |
Tue, 24 Jan 2017 16:43:22 +0000 |
User-agent: |
mu4e 0.9.19; emacs 25.1.91.4 |
Peter Maydell <address@hidden> writes:
> From: Michael Davidsaver <address@hidden>
>
> Give an explicit error and abort when a load
> from the vector table fails. Architecturally this
> should HardFault (which will then immediately
> fail to load the HardFault vector and go into Lockup).
> Since we don't model Lockup, just report this guest
> error via cpu_abort(). This is more helpful than the
> previous behaviour of reading a zero, which is the
> address of the reset stack pointer and not a sensible
> location to jump to.
Word wrap has gone a little aggressive in the commit message ;-)
>
> Signed-off-by: Michael Davidsaver <address@hidden>
> Reviewed-by: Peter Maydell <address@hidden>
> [PMM: expanded commit message]
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> target/arm/helper.c | 26 +++++++++++++++++++++++++-
> 1 file changed, 25 insertions(+), 1 deletion(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index ad23de3..8edb08c 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -6014,6 +6014,30 @@ static void arm_log_exception(int idx)
> }
> }
>
> +static uint32_t arm_v7m_load_vector(ARMCPU *cpu)
> +
> +{
> + CPUState *cs = CPU(cpu);
> + CPUARMState *env = &cpu->env;
> + MemTxResult result;
> + hwaddr vec = env->v7m.vecbase + env->v7m.exception * 4;
> + uint32_t addr;
> +
> + addr = address_space_ldl(cs->as, vec,
> + MEMTXATTRS_UNSPECIFIED, &result);
> + if (result != MEMTX_OK) {
> + /* Architecturally this should cause a HardFault setting
> HSFR.VECTTBL,
> + * which would then be immediately followed by our failing to load
> + * the entry vector for that HardFault, which is a Lockup case.
> + * Since we don't model Lockup, we just report this guest error
> + * via cpu_abort().
> + */
> + cpu_abort(cs, "Failed to read from exception vector table "
> + "entry %08x\n", (unsigned)vec);
> + }
> + return addr;
> +}
> +
> void arm_v7m_cpu_do_interrupt(CPUState *cs)
> {
> ARMCPU *cpu = ARM_CPU(cs);
> @@ -6095,7 +6119,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
> /* Clear IT bits */
> env->condexec_bits = 0;
> env->regs[14] = lr;
> - addr = ldl_phys(cs->as, env->v7m.vecbase + env->v7m.exception * 4);
> + addr = arm_v7m_load_vector(cpu);
> env->regs[15] = addr & 0xfffffffe;
> env->thumb = addr & 1;
> }
Reviewed-by: Alex Bennée <address@hidden>
--
Alex Bennée
- [Qemu-arm] [PATCH 1/6] armv7m: MRS/MSR: handle unprivileged access, (continued)
- [Qemu-arm] [PATCH 1/6] armv7m: MRS/MSR: handle unprivileged access, Peter Maydell, 2017/01/20
- [Qemu-arm] [PATCH 5/6] armv7m: Fix reads of CONTROL register bit 1, Peter Maydell, 2017/01/20
- [Qemu-arm] [PATCH 4/6] hw/registerfields.h: Pull FIELD etc macros out of hw/register.h, Peter Maydell, 2017/01/20
- [Qemu-arm] [PATCH 3/6] armv7m: Explicit error for bad vector table, Peter Maydell, 2017/01/20
- Re: [Qemu-arm] [PATCH 3/6] armv7m: Explicit error for bad vector table,
Alex Bennée <=
- [Qemu-arm] [PATCH 2/6] armv7m: Replace armv7m.hack with unassigned_access handler, Peter Maydell, 2017/01/20
- Re: [Qemu-arm] [Qemu-devel] [PATCH 0/6] ARMv7M: some simple bugfixes and cleanups, no-reply, 2017/01/20
- Re: [Qemu-arm] [PATCH 0/6] ARMv7M: some simple bugfixes and cleanups, Alex Bennée, 2017/01/24