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Re: [Qemu-arm] [kvm-unit-tests PATCH v2 03/10] arm/arm64: smp: support m


From: Mark Rutland
Subject: Re: [Qemu-arm] [kvm-unit-tests PATCH v2 03/10] arm/arm64: smp: support more than 8 cpus
Date: Mon, 6 Jun 2016 17:32:38 +0100
User-agent: Mutt/1.5.21 (2010-09-15)

On Mon, Jun 06, 2016 at 05:22:49PM +0100, Alex Bennée wrote:
> Andrew Jones <address@hidden> writes:
> > +#define MPIDR_LEVEL_SHIFT(level) \
> > +   (((1 << level) >> 1) << 3)
> > +#define MPIDR_AFFINITY_LEVEL(mpidr, level) \
> > +   ((mpidr >> MPIDR_LEVEL_SHIFT(level)) & 0xff)
> 
> Doesn't Aff3 break this little macro? It sits at 32:39 with a gap for
> MT, RES0, U, RES1 for bits 25:31

It works, it's just a little bit magic:

(gdb) p (((1 << 0) >> 1) << 3)
$1 = 0
(gdb) p (((1 << 1) >> 1) << 3)
$2 = 8
(gdb) p (((1 << 2) >> 1) << 3)
$3 = 16
(gdb) p (((1 << 3) >> 1) << 3)
$4 = 32
(gdb) 

We do the same in arch/arm64/include/asm/cputype.h since b058450f38c337d1
("arm64: kernel: add MPIDR_EL1 accessors macros").

Thanks,
Mark.



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