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[Qemu-arm] [PATCH v3 4/7] target-arm: Split data abort syndrome generato
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-arm] [PATCH v3 4/7] target-arm: Split data abort syndrome generator |
Date: |
Fri, 29 Apr 2016 14:08:01 +0200 |
From: "Edgar E. Iglesias" <address@hidden>
Split the data abort syndrome generator into two versions.
One with a valid Instruction Specific Syndrome (ISS) and another without.
The following new flags are supported by the syndrome generator
with ISS:
* isv - Instruction syndrome valid
* sas - Syndrome access size
* sse - Syndrome sign extend
* srt - Syndrome register transfer
* sf - Sixty-Four bit register width
* ar - Acquire/Release
These flags are not yet used, so this patch has no functional change.
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
target-arm/internals.h | 26 +++++++++++++++++++++-----
target-arm/op_helper.c | 8 ++++----
2 files changed, 25 insertions(+), 9 deletions(-)
diff --git a/target-arm/internals.h b/target-arm/internals.h
index 34e2688..54a0fb1 100644
--- a/target-arm/internals.h
+++ b/target-arm/internals.h
@@ -263,7 +263,9 @@ enum arm_exception_class {
#define ARM_EL_EC_SHIFT 26
#define ARM_EL_IL_SHIFT 25
+#define ARM_EL_ISV_SHIFT 24
#define ARM_EL_IL (1 << ARM_EL_IL_SHIFT)
+#define ARM_EL_ISV (1 << ARM_EL_ISV_SHIFT)
/* Utility functions for constructing various kinds of syndrome value.
* Note that in general we follow the AArch64 syndrome values; in a
@@ -383,13 +385,27 @@ static inline uint32_t syn_insn_abort(int same_el, int
ea, int s1ptw, int fsc)
| (ea << 9) | (s1ptw << 7) | fsc;
}
-static inline uint32_t syn_data_abort(int same_el, int ea, int cm, int s1ptw,
- int wnr, int fsc,
- bool is_16bit)
+static inline uint32_t syn_data_abort_no_iss(int same_el,
+ int ea, int cm, int s1ptw,
+ int wnr, int fsc)
{
return (EC_DATAABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT)
- | (is_16bit ? 0 : ARM_EL_IL)
- | (ea << 9) | (cm << 8) | (s1ptw << 7) | (wnr << 6) | fsc;
+ | ARM_EL_IL
+ | (ea << 9) | (cm << 8) | (s1ptw << 7) | (wnr << 6) | fsc;
+}
+
+static inline uint32_t syn_data_abort_with_iss(int same_el,
+ int sas, int sse, int srt,
+ int sf, int ar,
+ int ea, int cm, int s1ptw,
+ int wnr, int fsc,
+ bool is_16bit)
+{
+ return (EC_DATAABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT)
+ | (is_16bit ? 0 : ARM_EL_IL)
+ | ARM_EL_ISV | (sas << 22) | (sse << 21) | (srt << 16)
+ | (sf << 15) | (ar << 14)
+ | (ea << 9) | (cm << 8) | (s1ptw << 7) | (wnr << 6) | fsc;
}
static inline uint32_t syn_swstep(int same_el, int isv, int ex)
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index e69c1de..c7fba85 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -115,8 +115,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, int
is_write, int mmu_idx,
syn = syn_insn_abort(same_el, 0, fi.s1ptw, syn);
exc = EXCP_PREFETCH_ABORT;
} else {
- syn = syn_data_abort(same_el, 0, 0, fi.s1ptw, is_write == 1, syn,
- 1);
+ syn = syn_data_abort_no_iss(same_el,
+ 0, 0, fi.s1ptw, is_write == 1, syn);
if (is_write == 1 && arm_feature(env, ARM_FEATURE_V6)) {
fsr |= (1 << 11);
}
@@ -162,8 +162,8 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
int is_write,
}
raise_exception(env, EXCP_DATA_ABORT,
- syn_data_abort(same_el, 0, 0, 0, is_write == 1, 0x21,
- 1),
+ syn_data_abort_no_iss(same_el,
+ 0, 0, 0, is_write == 1, 0x21),
target_el);
}
--
2.5.0
- [Qemu-arm] [PATCH v3 0/7] arm: Steps towards EL2 support round 6, Edgar E. Iglesias, 2016/04/29
- [Qemu-arm] [PATCH v3 2/7] gen-icount: Use tcg_set_insn_param, Edgar E. Iglesias, 2016/04/29
- [Qemu-arm] [PATCH v3 1/7] tcg: Add tcg_set_insn_param, Edgar E. Iglesias, 2016/04/29
- [Qemu-arm] [PATCH v3 5/7] target-arm/translate-a64.c: Use extract32 in disas_ldst_reg_imm9, Edgar E. Iglesias, 2016/04/29
- [Qemu-arm] [PATCH v3 4/7] target-arm: Split data abort syndrome generator,
Edgar E. Iglesias <=
- [Qemu-arm] [PATCH v3 6/7] target-arm/translate-a64.c: Unify some of the ldst_reg decoding, Edgar E. Iglesias, 2016/04/29
- [Qemu-arm] [PATCH v3 7/7] target-arm: A64: Create Instruction Syndromes for Data Aborts, Edgar E. Iglesias, 2016/04/29
- [Qemu-arm] [PATCH v3 3/7] target-arm: Add the IL flag to syn_data_abort, Edgar E. Iglesias, 2016/04/29