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Re: [Qemu-arm] [PATCH v1 10/17] target-arm: implement setend
From: |
Peter Maydell |
Subject: |
Re: [Qemu-arm] [PATCH v1 10/17] target-arm: implement setend |
Date: |
Tue, 19 Jan 2016 16:29:44 +0000 |
On 18 January 2016 at 07:12, Peter Crosthwaite
<address@hidden> wrote:
> From: Paolo Bonzini <address@hidden>
>
> Since this is not a high-performance path, just use a helper to
> flip the E bit and force a lookup in the hash table since the
> flags have changed.
>
> Signed-off-by: Paolo Bonzini <address@hidden>
> Signed-off-by: Peter Crosthwaite <address@hidden>
> ---
>
> target-arm/helper.h | 1 +
> target-arm/op_helper.c | 5 +++++
> target-arm/translate.c | 16 ++++++++--------
> 3 files changed, 14 insertions(+), 8 deletions(-)
>
> diff --git a/target-arm/helper.h b/target-arm/helper.h
> index c2a85c7..2315a9c 100644
> --- a/target-arm/helper.h
> +++ b/target-arm/helper.h
> @@ -48,6 +48,7 @@ DEF_HELPER_FLAGS_3(sel_flags, TCG_CALL_NO_RWG_SE,
> i32, i32, i32, i32)
> DEF_HELPER_2(exception_internal, void, env, i32)
> DEF_HELPER_4(exception_with_syndrome, void, env, i32, i32, i32)
> +DEF_HELPER_1(setend, void, env)
> DEF_HELPER_1(wfi, void, env)
> DEF_HELPER_1(wfe, void, env)
> DEF_HELPER_1(yield, void, env)
> diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
> index e42d287..2a4bc67 100644
> --- a/target-arm/op_helper.c
> +++ b/target-arm/op_helper.c
> @@ -295,6 +295,11 @@ uint32_t HELPER(usat16)(CPUARMState *env, uint32_t x,
> uint32_t shift)
> return res;
> }
>
> +void HELPER(setend)(CPUARMState *env)
> +{
> + env->uncached_cpsr ^= CPSR_E;
> +}
> +
> /* Function checks whether WFx (WFI/WFE) instructions are set up to be
> trapped.
> * The function returns the target EL (1-3) if the instruction is to be
> trapped;
> * otherwise it returns 0 indicating it is not trapped.
> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index cb925ef..192a5d6 100644
> --- a/target-arm/translate.c
> +++ b/target-arm/translate.c
> @@ -7726,10 +7726,10 @@ static void disas_arm_insn(DisasContext *s, unsigned
> int insn)
> if ((insn & 0x0ffffdff) == 0x01010000) {
> ARCH(6);
> /* setend */
> - if (((insn >> 9) & 1) != s->bswap_code) {
> - /* Dynamic endianness switching not implemented. */
> - qemu_log_mask(LOG_UNIMP, "arm: unimplemented setend\n");
> - goto illegal_op;
> + if (((insn >> 9) & 1) != !!(s->mo_endianness == MO_BE)) {
> + gen_helper_setend(cpu_env);
> + gen_set_pc_im(s, s->pc);
> + s->is_jmp = DISAS_JUMP;
Rather than manually calling set_pc_im and using DISAS_JUMP, better
to use DISAS_UPDATE, which will do the gen_set_pc_im() call for you.
(Ditto in the other hunk.)
thanks
-- PMM
- [Qemu-arm] [PATCH v1 09/17] target-arm: introduce tbflag for endianness, (continued)
- [Qemu-arm] [PATCH v1 09/17] target-arm: introduce tbflag for endianness, Peter Crosthwaite, 2016/01/18
- [Qemu-arm] [PATCH v1 07/17] target-arm: a64: Add endianness support, Peter Crosthwaite, 2016/01/18
- [Qemu-arm] [PATCH v1 05/17] target-arm: pass DisasContext to gen_aa32_ld*/st*, Peter Crosthwaite, 2016/01/18
- [Qemu-arm] [PATCH v1 08/17] target-arm: cpu: Move cpu_is_big_endian to header, Peter Crosthwaite, 2016/01/18
- [Qemu-arm] [PATCH v1 10/17] target-arm: implement setend, Peter Crosthwaite, 2016/01/18
- Re: [Qemu-arm] [PATCH v1 10/17] target-arm: implement setend,
Peter Maydell <=
- [Qemu-arm] [PATCH v1 11/17] linux-user: arm: pass env to get_user_code_*, Peter Crosthwaite, 2016/01/18
- [Qemu-arm] [PATCH v1 13/17] arm: linux-user: don't set CPSR.E in BE32 mode, Peter Crosthwaite, 2016/01/18
- [Qemu-arm] [PATCH v1 12/17] target-arm: implement SCTLR.B, drop bswap_code, Peter Crosthwaite, 2016/01/18
- [Qemu-arm] [PATCH v1 15/17] loader: add API to load elf header, Peter Crosthwaite, 2016/01/18
- [Qemu-arm] [PATCH v1 14/17] target-arm: implement BE32 mode in system emulation, Peter Crosthwaite, 2016/01/18