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[paparazzi-commits] [4797] getting closer
|
From: |
antoine drouin |
|
Subject: |
[paparazzi-commits] [4797] getting closer |
|
Date: |
Fri, 16 Apr 2010 17:55:33 +0000 |
Revision: 4797
http://svn.sv.gnu.org/viewvc/?view=rev&root=paparazzi&revision=4797
Author: poine
Date: 2010-04-16 17:55:32 +0000 (Fri, 16 Apr 2010)
Log Message:
-----------
getting closer
Modified Paths:
--------------
paparazzi3/trunk/sw/airborne/booz/arch/stm32/actuators/booz_actuators_pwm_hw.c
Added Paths:
-----------
paparazzi3/trunk/sw/airborne/booz/arch/stm32/imu/
paparazzi3/trunk/sw/airborne/booz/arch/stm32/imu/booz_imu_b2_arch.c
paparazzi3/trunk/sw/airborne/booz/arch/stm32/imu/booz_imu_b2_arch.h
paparazzi3/trunk/sw/airborne/booz/arch/stm32/peripherals/
paparazzi3/trunk/sw/airborne/booz/arch/stm32/peripherals/booz_max1168_arch.c
paparazzi3/trunk/sw/airborne/booz/arch/stm32/peripherals/booz_max1168_arch.h
paparazzi3/trunk/sw/airborne/booz/arch/stm32/peripherals/booz_ms2001_arch.c
paparazzi3/trunk/sw/airborne/booz/arch/stm32/peripherals/booz_ms2001_arch.h
Modified:
paparazzi3/trunk/sw/airborne/booz/arch/stm32/actuators/booz_actuators_pwm_hw.c
===================================================================
---
paparazzi3/trunk/sw/airborne/booz/arch/stm32/actuators/booz_actuators_pwm_hw.c
2010-04-14 19:41:39 UTC (rev 4796)
+++
paparazzi3/trunk/sw/airborne/booz/arch/stm32/actuators/booz_actuators_pwm_hw.c
2010-04-16 17:55:32 UTC (rev 4797)
@@ -40,7 +40,7 @@
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB |
RCC_APB2Periph_GPIOC |
RCC_APB2Periph_AFIO, ENABLE);
/* GPIO */
- /* PC6=servo1 PC7=servo2 PB0=servo3 */
+ /* PC6=servo1 PC7=servo2 PC8=servo3 PC9=servo4 */
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7 | GPIO_Pin_8 |
GPIO_Pin_9;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
Added: paparazzi3/trunk/sw/airborne/booz/arch/stm32/imu/booz_imu_b2_arch.c
===================================================================
--- paparazzi3/trunk/sw/airborne/booz/arch/stm32/imu/booz_imu_b2_arch.c
(rev 0)
+++ paparazzi3/trunk/sw/airborne/booz/arch/stm32/imu/booz_imu_b2_arch.c
2010-04-16 17:55:32 UTC (rev 4797)
@@ -0,0 +1,108 @@
+/*
+ * $Id$
+ *
+ * Copyright (C) 20010 Antoine Drouin <address@hidden>
+ *
+ * This file is part of Paparazzi.
+ *
+ * Paparazzi is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * Paparazzi is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with Paparazzi; see the file COPYING. If not, write to
+ * the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+#include "booz_imu.h"
+
+#include <stm32/gpio.h>
+#include <stm32/rcc.h>
+#include <stm32/spi.h>
+#include <stm32/exti.h>
+#include <stm32/misc.h>
+#include <stm32/dma.h>
+
+#define BOOZ_IMU_SSP_STA_IDLE 0
+#define BOOZ_IMU_SSP_STA_BUSY_MAX1168 1
+#define BOOZ_IMU_SSP_STA_BUSY_MS2100 2
+
+volatile uint8_t booz_imu_ssp_status;
+
+void booz_imu_b2_arch_init(void) {
+
+ /* Enable SPI2 Periph clock
-------------------------------------------------*/
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE);
+ /* Enable SPI_2 DMA clock
---------------------------------------------------*/
+ RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
+ /* Enable PORTB GPIO clock
--------------------------------------------------*/
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO , ENABLE);
+ /* Configure GPIOs: SCK, MISO and MOSI
-------------------------------------*/
+ GPIO_InitTypeDef GPIO_InitStructure;
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
+ GPIO_Init(GPIOB, &GPIO_InitStructure);
+ /* Enable DMA1 channel4 IRQ Channel */
+ NVIC_InitTypeDef NVIC_init_struct = {
+ .NVIC_IRQChannel = DMA1_Channel4_IRQn,
+ .NVIC_IRQChannelPreemptionPriority = 0,
+ .NVIC_IRQChannelSubPriority = 0,
+ .NVIC_IRQChannelCmd = ENABLE
+ };
+ NVIC_Init(&NVIC_init_struct);
+ /* Enable SPI2 IRQ Channel */
+ NVIC_InitTypeDef NVIC_init_structure_spi = {
+ .NVIC_IRQChannel = SPI2_IRQn,
+ .NVIC_IRQChannelPreemptionPriority = 0,
+ .NVIC_IRQChannelSubPriority = 1,
+ .NVIC_IRQChannelCmd = ENABLE
+ };
+ NVIC_Init(&NVIC_init_structure_spi);
+
+ booz_imu_ssp_status = BOOZ_IMU_SSP_STA_IDLE;
+}
+
+void booz_imu_periodic(void) {
+ // check ssp idle
+ // ASSERT((booz_imu_status == BOOZ_IMU_STA_IDLE), DEBUG_IMU, IMU_ERR_OVERUN);
+ booz_imu_ssp_status = BOOZ_IMU_SSP_STA_BUSY_MAX1168;
+ Max1168ConfigureSPI();
+ SPI_Cmd(SPI2, ENABLE);
+ booz_max1168_read();
+
+}
+
+void dma1_c4_irq_handler(void) {
+ switch (booz_imu_ssp_status) {
+ case BOOZ_IMU_SSP_STA_BUSY_MAX1168:
+ Max1168OnDmaIrq();
+ SPI_Cmd(SPI2, DISABLE);
+ if (ms2001_status == MS2001_IDLE) {
+ Ms2001SendReq();
+ booz_imu_ssp_status = BOOZ_IMU_SSP_STA_BUSY_MS2100;
+ }
+ else if (ms2001_status == MS2001_WAITING_EOC && Ms2001HasEOC()) {
+ Ms2001ReadRes();
+ booz_imu_ssp_status = BOOZ_IMU_SSP_STA_BUSY_MS2100;
+ }
+ else
+ booz_imu_ssp_status = BOOZ_IMU_SSP_STA_IDLE;
+ break;
+ case BOOZ_IMU_SSP_STA_BUSY_MS2100:
+ Ms2001OnDmaIrq();
+ break;
+ }
+}
+
+
+void spi2_irq_handler(void) {
+ Ms2001OnSpiIrq();
+}
Added: paparazzi3/trunk/sw/airborne/booz/arch/stm32/imu/booz_imu_b2_arch.h
===================================================================
--- paparazzi3/trunk/sw/airborne/booz/arch/stm32/imu/booz_imu_b2_arch.h
(rev 0)
+++ paparazzi3/trunk/sw/airborne/booz/arch/stm32/imu/booz_imu_b2_arch.h
2010-04-16 17:55:32 UTC (rev 4797)
@@ -0,0 +1,31 @@
+/*
+ * $Id: booz_imu_b2_arch.h 3732 2009-07-20 17:46:54Z poine $
+ *
+ * Copyright (C) 2008-2009 Antoine Drouin <address@hidden>
+ *
+ * This file is part of paparazzi.
+ *
+ * paparazzi is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * paparazzi is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with paparazzi; see the file COPYING. If not, write to
+ * the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+#ifndef BOOZ_IMU_B2_ARCH_H
+#define BOOZ_IMU_B2_ARCH_H
+
+
+
+#endif /* BOOZ_IMU_B2_ARCH_H */
+
+
Added:
paparazzi3/trunk/sw/airborne/booz/arch/stm32/peripherals/booz_max1168_arch.c
===================================================================
---
paparazzi3/trunk/sw/airborne/booz/arch/stm32/peripherals/booz_max1168_arch.c
(rev 0)
+++
paparazzi3/trunk/sw/airborne/booz/arch/stm32/peripherals/booz_max1168_arch.c
2010-04-16 17:55:32 UTC (rev 4797)
@@ -0,0 +1,161 @@
+/*
+ * $Id$
+ *
+ * Copyright (C) 2010 Antoine Drouin <address@hidden>
+ *
+ * This file is part of paparazzi.
+ *
+ * paparazzi is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * paparazzi is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with paparazzi; see the file COPYING. If not, write to
+ * the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+#include "peripherals/booz_max1168.h"
+
+#include <stm32/rcc.h>
+#include <stm32/spi.h>
+#include <stm32/exti.h>
+#include <stm32/misc.h>
+#include <stm32/dma.h>
+
+#include "led.h" // for debug, remove me
+
+void booz_max1168_arch_init( void ) {
+
+ /* set slave select as output and assert it ( on PB12) */
+ Max1168Unselect();
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
+ GPIO_InitTypeDef GPIO_InitStructure;
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_Init(GPIOB, &GPIO_InitStructure);
+
+ /* configure external interrupt exti2 on PD2( data ready ) */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_AFIO, ENABLE);
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_Init(GPIOD, &GPIO_InitStructure);
+
+ EXTI_InitTypeDef EXTI_InitStructure;
+ GPIO_EXTILineConfig(GPIO_PortSourceGPIOD, GPIO_PinSource2);
+ EXTI_InitStructure.EXTI_Line = EXTI_Line2;
+ EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
+ EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
+ EXTI_InitStructure.EXTI_LineCmd = ENABLE;
+ EXTI_Init(&EXTI_InitStructure);
+
+ NVIC_InitTypeDef NVIC_InitStructure;
+ NVIC_InitStructure.NVIC_IRQChannel = EXTI2_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F;
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F;
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+
+ NVIC_Init(&NVIC_InitStructure);
+
+#ifdef MAX1168_HANDLES_DMA_IRQ
+ /* Enable DMA1 channel4 IRQ Channel */
+ NVIC_InitTypeDef NVIC_init_struct = {
+ .NVIC_IRQChannel = DMA1_Channel4_IRQn,
+ .NVIC_IRQChannelPreemptionPriority = 0,
+ .NVIC_IRQChannelSubPriority = 0,
+ .NVIC_IRQChannelCmd = ENABLE
+ };
+ NVIC_Init(&NVIC_init_struct);
+#endif /* MAX1168_HANDLES_DMA_IRQ */
+}
+
+void booz_max1168_read( void ) {
+ /* ASSERT((booz_max1168_status == STA_MAX1168_IDLE), \
+ * DEBUG_MAX_1168, MAX1168_ERR_READ_OVERUN);
+ */
+ /* select max1168 */
+ Max1168Select();
+
+ /* write control byte - wait EOC on extint */
+ const uint16_t ctl_byte = (1 << 0 | 1 << 3 | 7 << 5) << 8;
+ SPI_I2S_SendData(SPI2, ctl_byte);
+ booz_max1168_status = STA_MAX1168_SENDING_REQ;
+
+}
+
+void exti2_irq_handler(void) {
+
+ /* ASSERT((booz_max1168_status == STA_MAX1168_SENDING_REQ), \
+ * DEBUG_MAX_1168, MAX1168_ERR_SPURIOUS_EOC);
+ */
+
+ /* clear EXTI */
+ if(EXTI_GetITStatus(EXTI_Line2) != RESET)
+ EXTI_ClearITPendingBit(EXTI_Line2);
+
+ /* read control byte FIXME: is this needed ?, yes*/
+ uint16_t foo __attribute__ ((unused)) = SPI_I2S_ReceiveData(SPI2);
+
+ /* trigger 8 frames read */
+ /* SPI2_Rx_DMA_Channel configuration ------------------------------------*/
+ DMA_DeInit(DMA1_Channel4);
+ DMA_InitTypeDef DMA_initStructure_4 = {
+ .DMA_PeripheralBaseAddr = (uint32_t)(SPI2_BASE+0x0C),
+ .DMA_MemoryBaseAddr = (uint32_t)booz_max1168_values,
+ .DMA_DIR = DMA_DIR_PeripheralSRC,
+ .DMA_BufferSize = MAX1168_NB_CHAN,
+ .DMA_PeripheralInc = DMA_PeripheralInc_Disable,
+ .DMA_MemoryInc = DMA_MemoryInc_Enable,
+ .DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord,
+ .DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord,
+ .DMA_Mode = DMA_Mode_Normal,
+ .DMA_Priority = DMA_Priority_VeryHigh,
+ .DMA_M2M = DMA_M2M_Disable
+ };
+ DMA_Init(DMA1_Channel4, &DMA_initStructure_4);
+
+ /* SPI2_Tx_DMA_Channel configuration ------------------------------------*/
+ DMA_DeInit(DMA1_Channel5);
+ DMA_InitTypeDef DMA_initStructure_5 = {
+ .DMA_PeripheralBaseAddr = (uint32_t)(SPI2_BASE+0x0C),
+ .DMA_MemoryBaseAddr = (uint32_t)booz_max1168_values,
+ .DMA_DIR = DMA_DIR_PeripheralDST,
+ .DMA_BufferSize = MAX1168_NB_CHAN,
+ .DMA_PeripheralInc = DMA_PeripheralInc_Disable,
+ .DMA_MemoryInc = DMA_MemoryInc_Enable,
+ .DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord,
+ .DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord,
+ .DMA_Mode = DMA_Mode_Normal,
+ .DMA_Priority = DMA_Priority_Medium,
+ .DMA_M2M = DMA_M2M_Disable
+ };
+ DMA_Init(DMA1_Channel5, &DMA_initStructure_5);
+
+ /* Enable SPI_2 Rx request */
+ SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, ENABLE);
+ /* Enable DMA1 Channel4 */
+ DMA_Cmd(DMA1_Channel4, ENABLE);
+
+ /* Enable SPI_2 Tx request */
+ SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, ENABLE);
+ /* Enable DMA1 Channel5 */
+ DMA_Cmd(DMA1_Channel5, ENABLE);
+
+ /* Enable DMA1 Channel6 Transfer Complete interrupt */
+ DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, ENABLE);
+
+ booz_max1168_status = STA_MAX1168_READING_RES;
+}
+
+#ifdef MAX1168_HANDLES_DMA_IRQ
+void dma1_c4_irq_handler(void) {
+ Max1168OnDmaIrq();
+}
+#endif /*MAX1168_HANDLES_DMA_IRQ */
Added:
paparazzi3/trunk/sw/airborne/booz/arch/stm32/peripherals/booz_max1168_arch.h
===================================================================
---
paparazzi3/trunk/sw/airborne/booz/arch/stm32/peripherals/booz_max1168_arch.h
(rev 0)
+++
paparazzi3/trunk/sw/airborne/booz/arch/stm32/peripherals/booz_max1168_arch.h
2010-04-16 17:55:32 UTC (rev 4797)
@@ -0,0 +1,69 @@
+/*
+ * $Id$
+ *
+ * Copyright (C) 2010 Antoine Drouin <address@hidden>
+ *
+ * This file is part of paparazzi.
+ *
+ * paparazzi is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * paparazzi is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with paparazzi; see the file COPYING. If not, write to
+ * the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+#ifndef BOOZ_MAX1168_ARCH_H
+#define BOOZ_MAX1168_ARCH_H
+
+/*
+ * max1168 analog to digital converter
+ * connected on spi2
+ * select on PB12
+ * drdy on PD2
+ */
+#include <stm32/gpio.h>
+
+#define Max1168Unselect() GPIOB->BSRR = GPIO_Pin_12
+#define Max1168Select() GPIOB->BRR = GPIO_Pin_12
+
+#define Max1168OnDmaIrq() { \
+ /* ASSERT((booz_max1168_status == STA_MAX1168_READING_RES), \
+ * DEBUG_MAX_1168, MAX1168_ERR_SPURIOUS_DMA_IRQ); \
+ */
\
+ Max1168Unselect(); \
+ DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, DISABLE); \
+ /* Disable SPI_2 Rx and TX request */ \
+ SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, DISABLE); \
+ SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, DISABLE); \
+ /* Disable DMA1 Channel4 and 5 */ \
+ DMA_Cmd(DMA1_Channel4, DISABLE); \
+ DMA_Cmd(DMA1_Channel5, DISABLE); \
+ \
+ booz_max1168_status = STA_MAX1168_DATA_AVAILABLE; \
+ }
+
+
+#define Max1168ConfigureSPI() {
\
+ SPI_InitTypeDef SPI_InitStructure; \
+ SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; \
+ SPI_InitStructure.SPI_Mode = SPI_Mode_Master; \
+ SPI_InitStructure.SPI_DataSize = SPI_DataSize_16b; \
+ SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; \
+ SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; \
+ SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; \
+ SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8; \
+ SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; \
+ SPI_InitStructure.SPI_CRCPolynomial = 7; \
+ SPI_Init(SPI2, &SPI_InitStructure);
\
+ }
+
+#endif /* BOOZ_MAX1168_ARCH_H */
Added:
paparazzi3/trunk/sw/airborne/booz/arch/stm32/peripherals/booz_ms2001_arch.c
===================================================================
--- paparazzi3/trunk/sw/airborne/booz/arch/stm32/peripherals/booz_ms2001_arch.c
(rev 0)
+++ paparazzi3/trunk/sw/airborne/booz/arch/stm32/peripherals/booz_ms2001_arch.c
2010-04-16 17:55:32 UTC (rev 4797)
@@ -0,0 +1,90 @@
+/*
+ * $Id$
+ *
+ * Copyright (C) 2010 Antoine Drouin <address@hidden>
+ *
+ * This file is part of paparazzi.
+ *
+ * paparazzi is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * paparazzi is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with paparazzi; see the file COPYING. If not, write to
+ * the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+#include "peripherals/booz_ms2001.h"
+
+#include <stm32/rcc.h>
+#include <stm32/spi.h>
+#include <stm32/exti.h>
+#include <stm32/misc.h>
+#include <stm32/dma.h>
+
+uint8_t ms2001_cur_axe;
+
+void ms2001_arch_init( void ) {
+
+ ms2001_cur_axe = 0;
+
+ /* set mag SS and reset as output and assert them (SS on PC12 reset on
PC13) ----*/
+ Ms2001Unselect();
+ Ms2001Set();
+
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
+ GPIO_InitTypeDef GPIO_InitStructure;
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ /* configure data ready on PB5 */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE);
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_Init(GPIOB, &GPIO_InitStructure);
+
+#ifdef MS2001_HANDLES_DMA_IRQ
+ /* Enable DMA1 channel4 IRQ Channel */
+ NVIC_InitTypeDef NVIC_init_structure_dma = {
+ .NVIC_IRQChannel = DMA1_Channel4_IRQn,
+ .NVIC_IRQChannelPreemptionPriority = 0,
+ .NVIC_IRQChannelSubPriority = 0,
+ .NVIC_IRQChannelCmd = ENABLE
+ };
+ NVIC_Init(&NVIC_init_structure_dma);
+#endif /* MS2001_HANDLES_DMA_IRQ */
+
+#ifdef MS2001_HANDLES_SPI_IRQ
+ NVIC_InitTypeDef NVIC_init_structure_spi = {
+ .NVIC_IRQChannel = SPI2_IRQn,
+ .NVIC_IRQChannelPreemptionPriority = 0,
+ .NVIC_IRQChannelSubPriority = 1,
+ .NVIC_IRQChannelCmd = ENABLE
+ };
+ NVIC_Init(&NVIC_init_structure_spi);
+#endif /* MS2001_HANDLES_SPI_IRQ */
+
+}
+
+#ifdef MS2001_HANDLES_SPI_IRQ
+void spi2_irq_handler(void) {
+ Ms2001OnSpiIrq();
+}
+#endif
+
+
+#ifdef MS2001_HANDLES_DMA_IRQ
+void dma1_c4_irq_handler(void) {
+ Ms2001OnDmaIrq();
+}
+#endif /* MS2001_HANDLES_DMA_IRQ */
Added:
paparazzi3/trunk/sw/airborne/booz/arch/stm32/peripherals/booz_ms2001_arch.h
===================================================================
--- paparazzi3/trunk/sw/airborne/booz/arch/stm32/peripherals/booz_ms2001_arch.h
(rev 0)
+++ paparazzi3/trunk/sw/airborne/booz/arch/stm32/peripherals/booz_ms2001_arch.h
2010-04-16 17:55:32 UTC (rev 4797)
@@ -0,0 +1,152 @@
+#ifndef BOOZ_MS2001_ARCH_H
+#define BOOZ_MS2001_ARCH_H
+
+/*
+ * $Id$
+ *
+ * Copyright (C) 2010 Antoine Drouin <address@hidden>
+ *
+ * This file is part of paparazzi.
+ *
+ * paparazzi is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * paparazzi is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with paparazzi; see the file COPYING. If not, write to
+ * the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+#include <stm32/gpio.h>
+#include <stm32/spi.h>
+
+extern uint8_t ms2001_cur_axe;
+
+#define Ms2001Select() GPIOC->BRR = GPIO_Pin_12
+#define Ms2001Unselect() GPIOC->BSRR = GPIO_Pin_12
+
+#define Ms2001Reset() GPIOC->BSRR = GPIO_Pin_13;
+#define Ms2001Set() GPIOC->BRR = GPIO_Pin_13
+
+#define Ms2001HasEOC() GPIO_ReadInputDataBit(GPIOB, GPIO_Pin_5)
+
+#define Ms2001SendReq() { \
+ Ms2001Select(); \
+ __IO uint32_t nCount = 4;for(; nCount != 0; nCount--); \
+ Ms2001Reset(); \
+ ms2001_status = MS2001_SENDING_REQ;
\
+ nCount = 4;for(; nCount != 0; nCount--); \
+ Ms2001Set(); \
+ uint16_t ctl_byte = ((ms2001_cur_axe+1) | (MS2001_DIVISOR << 4)); \
+ nCount = 20;for(; nCount != 0; nCount--); \
+ SPI_Cmd(SPI2, DISABLE); \
+ SPI_InitTypeDef SPI_InitStructure = { \
+ .SPI_Direction = SPI_Direction_2Lines_FullDuplex,
\
+ .SPI_Mode = SPI_Mode_Master, \
+ .SPI_DataSize = SPI_DataSize_8b, \
+ .SPI_CPOL = SPI_CPOL_Low,
\
+ .SPI_CPHA = SPI_CPHA_1Edge, \
+ .SPI_NSS = SPI_NSS_Soft, \
+ .SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64, \
+ .SPI_FirstBit = SPI_FirstBit_MSB,
\
+ .SPI_CRCPolynomial = 7 \
+ }; \
+ SPI_Init(SPI2, &SPI_InitStructure);
\
+ SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_RXNE, ENABLE); \
+ SPI_Cmd(SPI2, ENABLE); \
+ SPI_I2S_SendData(SPI2, ctl_byte); \
+ }
+
+#define Ms2001ReadRes() { \
+ ms2001_status = MS2001_READING_RES;
\
+ Ms2001Select(); \
+ SPI_Cmd(SPI2, DISABLE); \
+ SPI_InitTypeDef SPI_InitStructure = { \
+ .SPI_Direction = SPI_Direction_2Lines_FullDuplex,
\
+ .SPI_Mode = SPI_Mode_Master, \
+ .SPI_DataSize = SPI_DataSize_16b,
\
+ .SPI_CPOL = SPI_CPOL_Low,
\
+ .SPI_CPHA = SPI_CPHA_1Edge, \
+ .SPI_NSS = SPI_NSS_Soft, \
+ .SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64, \
+ .SPI_FirstBit = SPI_FirstBit_MSB,
\
+ .SPI_CRCPolynomial = 7 \
+ }; \
+ SPI_Init(SPI2, &SPI_InitStructure);
\
+ SPI_Cmd(SPI2, ENABLE); \
+ \
+ /* trigger 2 frames read */
\
+ /* SPI2_Rx_DMA_Channel configuration
------------------------------------*/ \
+ DMA_InitTypeDef DMA_InitStructure;
\
+ DMA_DeInit(DMA1_Channel4); \
+ DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(SPI2_BASE+0x0C); \
+ DMA_InitStructure.DMA_MemoryBaseAddr =
(uint32_t)(&ms2001_values[ms2001_cur_axe]); \
+ DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; \
+ DMA_InitStructure.DMA_BufferSize = 1; \
+ DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; \
+ DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; \
+ DMA_InitStructure.DMA_PeripheralDataSize =
DMA_PeripheralDataSize_HalfWord; \
+ DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
\
+ DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; \
+ DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; \
+ DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; \
+ DMA_Init(DMA1_Channel4, &DMA_InitStructure); \
+ /* SPI2_Tx_DMA_Channel configuration
------------------------------------*/ \
+ DMA_DeInit(DMA1_Channel5); \
+ DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)(SPI2_BASE+0x0C); \
+ DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)&ms2001_values; \
+ DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; \
+ DMA_InitStructure.DMA_Priority = DMA_Priority_Medium; \
+ DMA_Init(DMA1_Channel5, &DMA_InitStructure); \
+ \
+ /* Enable SPI_2 Rx request */ \
+ SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Rx, ENABLE); \
+ /* Enable DMA1 Channel4 */ \
+ DMA_Cmd(DMA1_Channel4, ENABLE); \
+ \
+ /* Enable SPI_2 Tx request */ \
+ SPI_I2S_DMACmd(SPI2, SPI_I2S_DMAReq_Tx, ENABLE); \
+ /* Enable DMA1 Channel5 */ \
+ DMA_Cmd(DMA1_Channel5, ENABLE); \
+ \
+ /* Enable DMA1 Channel4 Transfer Complete interrupt */ \
+ DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, ENABLE); \
+ \
+ }
+
+#define Ms2001OnDmaIrq() { \
+ /* ASSERT((ms2001_status == MS2001_READING_RES), \
+ * DEBUG_MS2001, MS2001_ERR_SPURIOUS_DMA_IRQ); \
+ */ \
+ Ms2001Unselect(); \
+ ms2001_cur_axe++; \
+ if (ms2001_cur_axe > 2) { \
+ ms2001_cur_axe = 0; \
+ ms2001_status = MS2001_DATA_AVAILABLE; \
+ } \
+ else \
+ ms2001_status = MS2001_IDLE; \
+ SPI_Cmd(SPI2, DISABLE); \
+ DMA_ITConfig(DMA1_Channel4, DMA_IT_TC, DISABLE); \
+ }
+
+#define Ms2001OnSpiIrq() { \
+ /* ASSERT((ms2001_status == MS2001_SENDING_REQ), \
+ * DEBUG_MS2001, MS2001_ERR_SPURIOUS_SPI_IRQ); \
+ */
\
+ /* read unused control byte reply */ \
+ uint8_t foo __attribute__ ((unused)) = SPI_I2S_ReceiveData(SPI2); \
+ Ms2001Unselect(); \
+ ms2001_status = MS2001_WAITING_EOC;
\
+ SPI_Cmd(SPI2, DISABLE); \
+ SPI_I2S_ITConfig(SPI2, SPI_I2S_IT_RXNE, DISABLE); \
+ }
+
+#endif /* BOOZ_MS2001_ARCH_H */
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