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Compiling multiple files with one command


From: Matt Lavoie
Subject: Compiling multiple files with one command
Date: Thu, 19 Jun 2003 17:11:30 -0700

Normally as make processes files that are out of date it executes a separate
command to update each.  There is some efficiency to be had by compiling
more than one file using a single instantiation of the compiler.

Is there any way to express this?

I've tried using the $? automatic variable, but I'm getting only 1 out of
date pre-req at a time.  [Ie the compiler is run for each file out of date]

Here's the core of the makefile I'm working on:
------------------------------

sources := file1.cpp file2.cpp

objects  :=  $(notdir $(addsuffix .obj,$(basename $(sources))))

common: $(OBJDIR) $(objects)

%.obj: %.cpp
        @$(ECHO) "Compilation file set: $?"
        $(CC) $(CPPFLAGS) $(CFLAGS) -c $?

$(OBJDIR):
        @$(ECHO) "Creating directory [$(OBJDIR)]"
        @$(MKDIR) $@

VPATH = src;$(OBJDIR)

-----------------------------------
Any help or suggestions is appreciated!

- Matt Lavoie

P.S. I'm using 3.80




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