Preventing recursive expansion of symbols containing "$"?

[Adrian Lumsden]

I have a makefile for building the Java application that I am working on. It 
has a target to build and execute the application:-

# This target builds the software and then runs it
and_run :                       \
        ${TARGET}               \
        RunIt

RunIt is a PHONY:-

.PHONY: RunIt
RunIt:
        @echo .
        @echo Running ${TARGET}
        @echo .
        @echo JRFLAGS    = ${JRFLAGS}
        @echo NI_JRFLAGS = ${NI_JRFLAGS}
        @echo .
        @java -version
        @echo .
        @echo .
        @echo java ${TARGET}
        java ${JRFLAGS} ${RCP} ${NI_JRFLAGS} ${TARGET}

JRFLAGS and RCP are symbols defined in the makefile like this:-

JRFLAGS         = -Xmx192M -server
RCP             = ${CCP}

NI_JRFLAGS is intended to be an environment variable which allows me to specify 
some more Java runtime flags without having to
change the makefile. I have:-

set NI_JRFLAGS=-Ddebug.CallContext -Ddebug.PositionToCommand 
-Ddebug.NIProgressBar$MouseHandler

So what I'm doing here is to define (-D) some symbols which get passed to the 
Java program. These ones are for debug support as
you've probably guessed.

My problem is that "$" in the string in the NIProgressBar$MouseHandler. When 
make sees it it takes it as a variable and attempts
recursive definition (which fails). This stuffs up the command line.

I have found the ":=" operator in GNU make but it doesn't help me. It makes the 
symbol that is being defined as a non-recursive
expansion symbol. If it also meant "carry out non-recursive expansion of the 
rhs" then it would help but it doesn't.

Any suggestions?

with regards,

Adrian Lumsden

- -------------------------------------------
Adrian Lumsden       Product Specialist
Scientific Software and Systems Limited

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