Re: [lwip-users] Low Iperf performance of lwip 1.4.1 on STM32 and FreeRTOS

[Jeff Barlow]

On 7/1/2013 12:56 AM, Claudius Zingerli wrote:
> ...This may further be related to the usage of RMII between the MAC
> and PHY and creating the RMII-Clock with the STM32-PLL. Datasheet
> jitter and precision should be OK for the PHY, but this might not be
> the cleanest solution (There is some hint in the datasheet that good
> guys should source the RMII clock by bypassing the PLL). So in a
> next step, I'm going to use a dedicated 50MHz oscillator to clock the
> PHY and MCU.

This is a known issue. Deriving the RMII-Clock with the STM32-PLL is 
just not a robust design.

There are several PHY chips (Micrel, etc) that have built in RMII clock 
generators that can use a low cost 25MHz crystal and provide a nice low 
jitter clock back to the MCU.
--
Later,
Jeff