Re: [Ltib] LPC3250 CTS/RTS for high speed UART

[engin]

Dear Kevin,

I have modified lpc32xx_hs.c for testing:
/* port->lock held by caller.  */
static void serial_lpc32xx_set_mctrl(struct uart_port *port,
        unsigned int mctrl) {
        u32 tmp = __raw_readl(LPC32XX_HSUART_CTRL(port->membase));
        __raw_writel(tmp|LPC32XX_HSU_HCTS_EN|LPC32XX_HSU_HRTS_EN,
                LPC32XX_HSUART_CTRL(port->membase));
        printk(KERN_NOTICE "CTS+RTS\n");
}

And then open /dev/ttyTX2 with CRTSCTS flag.
It is confirmed that HRTS_EN and HCTS_EN bits have been set to HSUART_CTRL,
but I can't read anything from the serial port. However, it works well if
HRTS_EN and HCRS_EN are cleared.

Is there anything wrong?
Thanks


Best Regards,
Engin Lee 李英準
Climax Technology Co., Ltd.
TEL: +886-2-2794-0001 ext. 234
-----Original Message-----
From: Kevin Wells [mailto:address@hidden 
Sent: Thursday, May 05, 2011 12:52 PM
To: engin
Cc: address@hidden; 'yk.chen'; 'Li Yuan-Lung'
Subject: RE: LPC3250 CTS/RTS for high speed UART

>>     So my question is, is hardware flow control function available for
>> high
>> speed UART?
CTS and RTS are only available on the high speed UARTS 2 and 7, not 1.
The code to use the signals is not implemented in the driver, although it
should be fairly easy to add in set_mctrl and get_mctrl.

Overall, there are 2 bits each for CTS and RTS polarity and enable, and a
FIFO level trip field for RTS de-assertion.

Kevin

> -----Original Message-----
> Subject: LPC3250 CTS/RTS for high speed UART
> 
> Dear Kevin,
> 
> We are trying to apply hardware flow control to HSUART7, but it seems to
> be
> some problem:
> 
> 1. The external device is connected to LPC3250 using HSUART7, and
> everything
> is ok if CTS/RTS is disabled. For example:
>       termios_new.c_cflag &= ~CRTSCTS;
> 
>    And then, we try to enable it, just like the following code:
>       termios_new.c_cflag &= ~CSIZE;  //8
>       termios_new.c_cflag |= CS8;
> 
>       // Set into raw, no echo mode
>       termios_new.c_iflag = IGNBRK;
>       termios_new.c_lflag = 0;
>       termios_new.c_oflag = 0;
>       termios_new.c_cflag |= CLOCAL | CREAD;
> 
>       termios_new.c_cflag &= ~PARENB;
>       termios_new.c_cflag &= ~CSTOPB;
> 
>       termios_new.c_cflag &= ~CRTSCTS;
>       termios_new.c_lflag &= ~(ICANON | ECHO | ECHOE | ISIG);
>       termios_new.c_iflag &= ~(IXON | IXOFF | IXANY);
>       termios_new.c_oflag &= ~OPOST;
> 
>     // (crtscts)
>       termios_new.c_cflag |= CRTSCTS;
> 
>    But RTS and CTS level are low after tty is opened. So we looked into
> lpc32xx_hs.c and mark out the CRTSCTS modification:
> static void serial_lpc32xx_set_termios(struct uart_port *port,
>       struct ktermios *termios, struct ktermios *old)
> {
>       unsigned long flags;
>       unsigned int baud, quot;
>       u32 tmp;
> 
>       /* Always 8-bit, no parity, 1 stop bit
>       termios->c_cflag &= ~(CSIZE | CSTOPB | PARENB | PARODD);
>       termios->c_cflag &= ~(HUPCL | CMSPAR | CLOCAL | CRTSCTS);
> //    termios->c_cflag |= CS8;
>       termios->c_cflag |= CS8 | CREAD | CLOCAL;//8N1
> 
> //    termios->c_cflag &= ~(HUPCL | CMSPAR | CLOCAL | CRTSCTS); move to
> above
>       */
>       baud = uart_get_baud_rate(port, termios, old, 0,
>               (port->uartclk / 14));
>       quot = __serial_get_clock_div(port->uartclk, baud);
> 
>    Unfortunately, RTS and CTS are still in low.
> 
> 
> 2.  We read the value of 0x4001C00C (HSU7_CTRL) register. It is 0x128D2.
>     That is, CTS and RTS are disabled even if CRTSCTS bit is set.
>     So we manually write 0x568d2 to 0x4001C00C register.
>     Then RTS will be pull high, but no data will be sent out.
>     We checked the driver code, LPC32XX_HSU_HRTS_EN and
> LPC32XX_HSU_HCTS_EN
> are unused.
>     So my question is, is hardware flow control function available for
> high
> speed UART?
> 
> Thanks a lot!
> 
> 
> Best Regards,
> Engin Lee 李英準
> Climax Technology Co., Ltd.
> TEL: +886-2-2794-0001 ext. 234
> 
> 
>