Octave and SystemVerilog are now connected!....and introduced to the Hardware Verification community

[Daniel CIUPITU]

Hello,

I am Daniel, a hardware verification engineer at AMIQ Consulting.

I managed to connect Octave with SystemVerilog in order to use Octave's functions as a reference implementation for various DSP algorithms.
The work resulted in one presentation at DVCon Europe (http://dvcon-europe.org/presentation/tutorial-t11-algorithm-verification) , a tutorial on AMIQ's blog (http://www.amiq.com/consulting/2014/11/21/how-to-connect-systemverilog-with-octave) and
three packages to speed-up DSP algorithm verification.
All these are contributed under Apache license to the Octave/SystemVerilog community and can be downloaded from github(https://github.com/amiq-consulting/amiq_sv_octave).

I wonder if you can add a short testimonial on Octave's home page/news page about this project?
I can provide the testimonial and anything else you would need to help you. Just let me know.

Thank you in advance.

Best regards,
Daniel Ciupitu