Re: GNU Make: "calling" sub make with target

[Mark Galeck]

>make -f Makefile-unittests test.
(...)
>make -f Makefile
(...)
>a) The application build fails when the build of the tests fails.


call Makefile-unittests recursively from Makefile, to do this:

make a rule like this in Makefile:

.PHONY: test
test:
$(MAKE) -f Makefile-unittests $@


But: I am assuming that test is self-contained, that is, does not use anything 
that is built in Makefile.  If not, then better not call $(MAKE) recursively, 
but merge the two makefiles into one.



>b) The application build fails when the run of the tests has faild.

I don't believe what you wrote is really what you want, because what you wrote 
is not possible.  What you wrote is that you want to run test, which needs 
application to be built, but then if the run fails, then application build 
should fail.  This is a circular dependency or "what was first: the chicken or 
the egg" problem.

  If you want to mix building and running of programs, the proper place to do 
it, is in a shell script that calls make and then runs the programs.  In such a 
script, you probably want to build both the test and the application, 
separately, and fail the script immediately if one of them fails, and then run 
the test if both builds pass.  

Mark