Re: why does touching Makefile allow make to know how to build dependency?

[Graham Menhennitt]

> I'm willing to write that off as a fault belonging to his email editor; 
> otherwise I would expect make to bork about a syntax error.
Indeed.
> (example 1)
> make: *** No rule to make target `subdir/outfile', needed by 
> `subdir/anotherFile'.  Stop.
Yes, it's example 1.
> the problem is that it doesn't know to look in subdir/Makefile for the 
> dependencies.  You probably have 
> something like this in the top-level Makefile:
>
> subdir/%: subdir/Makefile
>         $(MAKE) -C subdir $*
>
> Fix this by changing it to
>
> subdir/%: subdir/ subdir/Makefile
>         $(MAKE) -C subdir $*
>
> This way, subdir/Makefile will be checked whenever anything in subdir/ 
> changes, not just when subdir/Makefile changes.  Leaving the
> subdir/Makefile bit prevents it from going into non-make directories.
Yep, I'll bet that's exactly the problem. Thank you very much. Now all I have 
to do is understand the many Makefiles so I can fix it.

Thank you for answering Luke (and Erik).

Regards,
        Graham
> On Fri, 2011-03-04 at 10:45 +0100, Erik Rull wrote:
> >/ Graham Menhennitt wrote:/
> >/ > In a Makefile in a subdirectory of our top level directory, I have some/ 
> >/rules:/
> >/ >/
> >/ > outfile: infile/
> >/ >//     cmd<  infile>  outfile/
> >/ >/
> >/ > anotherFile: outfile/
> >/ /
> >/ Have you considered newlines and tabs set correctly?/