include dependencies in foreach

[Alan Rouse]

I am a novice in Make, only using it as a tool for developing a project via Eclipse.  I obtained a Makefile that works, but with the problem that Dependencies don't work, and I am trying to fix it:

My project has two sub-directories, named Windows Workspace (the Eclipse workspace, containing a sub-directory of the project name from which Makefile is launched) and Src (containing all source files).

My Makefile includes the following:

obj/$(PROJECT_NAME).elf : $(OBJ_FILES) obj/startup_stm32f10x.o Makefile
	@echo -----------------------------------------
	@echo LINKING..
	$(LINK) $(CFLAGS) $(OBJ_FILES) obj/startup_stm32f10x.o $(LIBS) $(LINKER_FLAGS) -o obj/$(PROJECT_NAME).elf
	$(SIZE) obj/$(PROJECT_NAME).elf

# Create object files from C source files.
define COMPILE_C_TEMPLATE
obj/$(notdir $(basename $(1))).o : $(1) obj/$(notdir $(basename $(1))).d
	@echo -----------------------------------------
	@echo COMPILING FILE: $$<
	$(COMPILE) -c  $$(CFLAGS) $$< -o $$@
endef
$(foreach src, $(SOURCE), $(eval $(call COMPILE_C_TEMPLATE, $(src))))

# Create dependency files from C source files.
define DEPEND_C_TEMPLATE
obj/$(notdir $(basename $(1))).d : $(1)
	@echo -----------------------------------------
	@echo CREATING DEPENDENCIES FOR $$<
	$(COMPILE) -MM $$(CFLAGS) $$< -o $$@
endef
$(foreach src, $(SOURCE), $(eval $(call DEPEND_C_TEMPLATE, $(src))))

obj/startup_stm32f10x.d : $(MEGA_LINK_FOLDER)/Source/Application/System/startup_stm32f10x.c
	@echo -----------------------------------------
	@echo CREATING DEPENDENCIES FOR startup_stm32f10x.c
	$(COMPILE) -MM $(CFLAGS) $(MEGA_LINK_FOLDER)/Source/Application/System/startup_stm32f10x.c -o obj/startup_stm32f10x.d

If I edit any 'c' file in the project this creates a 'd' file in the obj directory, typically IOcommon.d, containing:

IOcommon.o: ../../src/Common/Source/IOcommon.c \
  ../../src/Common/Include/IOcommon.h ../../src/Common/Include/Type.h \
  ../../src/STLIB/CMSIS/Core/CM3/stm32f10x.h \
     .
     .
     . 
  ../../src/FreeRTOS/Source/include/queue.h

This works, and successfully creates the linked project file xx.elf.  If I edit any c files the d file. the o file and the elf file are all re-built as expected.  However, it should be apparent that COMPILE_C_TEMPLATE only updates IOcommon.o if IOcommon.d is changed (i.e. if IOcommon.c is changed, not if any of the header files is changed).  I obviously need to include the body of IOcommon.d within COMPILE_C_TEMPLATE.  I have tried changing it to:

# Create object files from C source files.
define COMPILE_C_TEMPLATE
	include	obj/$(notdir $(basename $(1))).d
	@echo -----------------------------------------
	@echo COMPILING FILE: $$<
	$(COMPILE) -c  $$(CFLAGS) $$< -o $$@
endef

However, this generates the error message 'commands commence before first target'.  I have tried all the variations on the theme that I can think of, without success.

I'm sure there must be a simple way of achieving my objective, and would appreciate any guidance.

Regards

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