Hi,
I'm still relatively new to make, so sorry
if any of this is obvious or not helpful.
I would try something like
this:
-----
app1: $(app1_src)
$(app1_include) $(libs)
cc $(whatever cc flags you need) test
# if you should build the library before tests, then reverse
the order of these steps.
build_the_library
# to use 'test',
if the test fails, will the compile of test fail, or do you have to run
test?
# if you have to run test, then run it now with its
parameters
# if you run test, and you want make to stop, in test use
exit(n) where n != 0.
test $(whatever params you need)
cc ... whatever is left of the compile for app1
-----
If all of this is standard for each step, you
could try to wildcard the rule with app% or %.exe or whatever the naming
convention is.
-----
If you want make in the app folders to
invoke make for the test, you want to look up 'recursive' make. There are
some strong thoughts out there as to whether or not recursive make is a good
idea, but to me, it makes some things simpler. If you want to do that,
then you would have something like the following:
target:
...
make
some_other_target
...
-----
If you want the make of target to continue
no matter what, then do "make -c some_other_target" do change to its directory
first.
-----
To automate what the building of the
dependencies, there is a flag to the compiler, "cc -M" will go through the files
and find all of the includes for you.
-----
I'm sure there is a cool way to do all of
this using autoconf et al but those are still magical to me.
Hope that helps,
James
Sent: Thursday, January 21, 2010 5:16 PM
Subject: How to: organize application files and get GNU make to put
theoutput files into the right place.
I managed to get GNU make
to find the source files and headers from the right paths, but I am having
trouble to get it to put gcc's output into the right place.
I made the
following directory
structure:
app1
app1/include
app1/src
app1/objs
app1/test
app2
app2/include
app2/src
app2/objs
app2/test
lib/src
lib/include
lib/test
If
I go into a given objs subdirectory, I can get the object files put into
it. So far, so good.
I could not get the same result from a given
application's directory
app1 and app2 both use/ depend on, my library
lib.
I was hoping it was possible to run make from an application's
directory and put the main executable there. And I wanted it to have each
source file in each test directory be compiled to an executable in the same
directory. I am not sure I can automate inference of what cpp files in src
a given exe file in test would depend on (is there a way?). But I
want to prevent the production of the application exe or the library, if any of
the tests fail.
Can I do this entirely from a single makefile in each
application's directory, or do I have to put a makefile into the lib and each
objs and test directory and somehow have the makefile in each application's
directory invoke make on the makefiles in the corresponding objs and test
subdirectories? If so, how? If this is in the manual, I seem to have
somehow missed it.
Thanks for any help you can provide.
Ted
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