Re: Request for help in setting a variable in GNU Make.

[Alexey Neyman]

Hey, he had already said what he needs:

<<<<<
The main thrust of my endeavor here is to gather a list of all .cpp
files that need to be compiled, and pass them to the compiler in one
shot rather than invoking the compiler separately for each .cpp file.
<<<<<

So, isn't the simplest way sufficient?

SRC = a.c b.c c.c
PROG = prog

all: $(PROG)

$(PROG): $(SRC)
    gcc -c $?
    gcc -o $@ $(^:.c=.o)


Regards,
Alexey.

On Thursday 06 April 2006 11:25, John Graham-Cumming wrote:
> Louie McCrady wrote:
> > objectFiles = $(patsubst %.cpp,%.o,$(wildcard *.cpp))
> > sourceFiles = "hello"
> > 
> > myprog.exe : $(objectFiles)
> >     @echo "all sources to be compiled :  $(sourceFiles)"
> > 
> > %.o : %.cpp
> >     @echo "Adding $< to the list to be compiled"
> >     set sourceFiles += $<
> >     @echo "sanity check: --- $(sourceFiles) --- $@ --- $< ---"
> 
> If you want to be really evil (i.e. break lots of Paul's rules) you 
can 
> do this:
> 
>     OBJS := $(wildcard *.cpp)
>     OBJS := $(OBJS:.cpp=.o)
> 
>     .PHONY: all
>     all: $(OBJS)
>         @echo $(SRCS) is the list of CPP files to recompile
> 
>     %.o : %.cpp
>         $(eval SRCS += $<)
> 
> John.
> -- 
> John Graham-Cumming
> address@hidden
> 
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