Re: loop on the command side help please

[Paul D. Smith]

%% "PATTON, BILLY \(SBCSI\)" <address@hidden> writes:

  pb> I have a rule I need to write:
  pb> LIST := a b c d ...

  pb> define some_template
  pb> echo "some_template"
  pb> endef
  pb> rule : 
  pb> <tab> foreach f ( $(LIST) ) $(call some_template,$f)

  pb> It's the foreach that I need help with.  On the command side of a
  pb> rule I need to loop through each of the elements of a list and
  pb> pass it, with call to the define statement.  I know the
  pb> terminology is not correct for pass, but I think you understand.

Why do you want to do this with make's loop?  You should use the shell's
loop here unless there's a specific reason you can't.  Since you show
the define just does an "echo" there's no need for this to use $(call ...)

The reason to use shell loops where possible is to keep the size of the
command passed to the shell manageable.  I've had situations where
people used $(foreach ...) to expand the loop and after the number of
items in the list got to a certain size the command line was too big to
go through to the shell!

  pb> I've seen examples where the f is $f and in the call it would be $$f
  pb> I'm so confused :)

Just keep straight in your mind: what is evaluated by make?  What is
evaluated by the shell?  You have two completely separate languages
here: make functions and shell syntax.  You have to clearly understand
which is which, or you'll be lost.

-- 
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