make always rebuilds...

[ody13]

Hi all,

I got a trivial Makefile looking like this, can someone tell me why all the
objects are rebuild everytime make is called? Any help is appreciated.

############################################
BRANCH = ../../../

include $(BRANCH)make/makedirdefs
include $(BRANCH)make/makerules

THISBINDIR = $(BRANCH)$(BINDIR)
THISLIBDIR = $(BRANCH)$(LIBDIR)

# source files
SRC = CCdid.cpp CID3Tagger.cpp ITagger.cpp CTaggerProxy.cpp

OBJ = $(SRC:.cpp=.o)
ALLOBJ = $(OBJ:.c=.o)

OUT = $(THISLIBDIR)libxtcore.a


# include directories
INCLUDES = -I. -I$(BRANCH)$(INCDIR)XTagger/ -I$(BRANCH)$(ID3LIBDIR)


.SUFFIXES: .cpp .c

# rules
default: $(OUT)

.cpp.o:
        $(ccc) $(INCLUDES) $(CCFLAGS) -c $< -o $(THISBINDIR)$@

.c.o:
        $(ccc) $(INCLUDES) $(CCFLAGS) -c $< -o $(THISBINDIR)$@

$(OUT): $(ALLOBJ)
        ar rvu $(OUT) $(THISBINDIR)CCdid.o $(THISBINDIR)CID3Tagger.o
$(THISBINDIR)ITagger.o $(THISBINDIR)CTaggerProxy.o
############################################


Cheers,
ODY
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