Importance of how make check dependances/builds targets

[Philippe Bernard]

Hi,


When a Makefile is submitted to make, it performs, roughly speaking, a 
two steps process:
1) Recursively check that dependances are correct. In other words, for 
each requested file:
   * Either it already exists
   * And/or there is a rule to build it.
2) Build!

For example, if make is given the following Makfile:

all:

myProg: main.o other.o
   gcc -o $@ $^

main.o: main.c
   gcc -o $@ -c $<

other.o: other.c
   gcc -o $@ -c $<

Make does:
   * To do all, I need myProg
       * To do myProg, I need main.o and other.o
           * To do main.o, I need main.c -> I've got it
           * To do other.o, I need other.c -> I've got it
   * Go accros the deps tree:
           gcc -o main.o -c main.c
           gcc -o other.o -c other.c
           gcc -o myProg main.o other.o

Another way to do that would be to build targets "as soon as possible". 
Here, make would do:
   * To do all, I need myProg
       * To do myProg, I need main.o and other.o
           * To do main.o, I need main.c -> I've got it -> gcc -o 
main.o -c main.c
           * To do other.o, I need other.c -> I've got it -> gcc -o 
other.o -c other.c
         gcc -o myProg main.o other.o

The first approach has the great advantage of detecting broken 
dependances immediatly.

So here is my questions: Are there other advantages ? Is the second 
approach wrong in some way, or is it just worse ?


Cheers,

Philippe