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Re: GNU Make problem with $(shell ... )
From: |
Paul D. Smith |
Subject: |
Re: GNU Make problem with $(shell ... ) |
Date: |
Mon, 3 Dec 2001 10:10:54 -0500 |
%% address@hidden writes:
tm> Now it gets a little more complicated because the contents of
tm> INFO_FILE get modified during the build, and I only want to
tm> evaluate FOO after INFO_FILE has been modified However what I'm
tm> finding is that if I modify the contents of INFO_FILE and then
tm> evaluate FOO in the same rule, then FOO uses the *old* contents of
tm> INFO_FILE and not the updated contents. If I move the operations
tm> into different rules then FOO contains the correct information
tm> (although obviously I have to ensure that the rules get evaluted
tm> in the correct order)
All the variables and functions in a rule script are evaluated before
the first line is run. For example, in:
foo:
echo $(FOO)
echo $(BAR)
Make goes:
evaluate FOO, evaluate BAR, run echo $(FOO), run echo $(BAR)
and NOT:
evaluate FOO, run echo $(FOO), evaluate BAR, run echo $(BAR)
tm> Any ideas?
It's not clear to me what you're _really_ trying to do. Note that make
is _NOT_ a procedural language; most of the time it doesn't just walk
from the top of the file to the bottom and invoke commands.
Further, note that you cannot set a make variable from within a command
script; those scripts are invoked in sub-shells and as with all
processes in UNIX, a child process cannot modify the environment of its
parent.
--
-------------------------------------------------------------------------------
Paul D. Smith <address@hidden> Find some GNU make tips at:
http://www.gnu.org http://www.paulandlesley.org/gmake/
"Please remain calm...I may be mad, but I am a professional." --Mad Scientist