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Re: target specific inclusion of makefiles
From: |
Jörg |
Subject: |
Re: target specific inclusion of makefiles |
Date: |
22 Aug 2005 23:24:30 -0700 |
User-agent: |
G2/0.2 |
Paul D. Smith schrieb:
> %% "Jörg" <joergmoellernexpress@hotmail.com> writes:
>
> j> Currently every module is created as a library and has it's own
> j> makefile. Every module makefile expands the name and path of the
> j> library that it creates to a commonly used macro. The idea is that
> j> just by including the modules makefile the set of needed libraries
> j> is defined.
>
> j> What I need now is a way to include these module makefiles target
> j> dependent.
>
> What about:
>
> MODULES = <list of modules>
>
> ifeq (foo,$(filter foo,$(MODULES)))
> include foo.mk
> endif
> ifeq (bar,$(filter bar,$(MODULES)))
> include bar.mk
> endif
>
> etc.? If you have a 1-1 relationship between modules and makefile names
> you can even just do this:
>
> MODULES = <list of modules>
>
> include $(MODULES:%=%.mk)
>
>
> You'll need to give some real details if you want better answers than
> that.
>
Good morning Paul,
thank you for trying to help out. Actually I just need an answer for
the following question:
How can I include makefiles depending on a target (not a macro)?
I've different targets to build and want to keep them in one makefile.
The sub targets that are needed for the root target are defined by
additional makefiles. I don't want (and actually can't) include
makefiles that are not needed for the root target that I want to build.
I hope that clarifies what I want to achieve without diggig to much
into the details.
Regards
Joerg