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Re: [h-e-w] Location of error lines from modelsim vhdl compile do not wo


From: Lennart Borgman
Subject: Re: [h-e-w] Location of error lines from modelsim vhdl compile do not work
Date: Sun, 2 May 2010 22:36:22 +0200

Hi Peter,

I see what you mean. It could make sense to ask for other peoples
experiences here.

But vhdl-mode is part of Emacs so I guess compiling vhdl files should
be supported by Emacs as well. I think the best thing to do then is to
send an Emacs bug report. Could you please do that?

If you can it would be good if you tried with a newer Emacs first.
There are binaries for the current beta to download.



2010/5/2 Peter Sørensen <address@hidden>:
> I can not try on Linux so I do not know. But I guess that developers test
> more on Linux, so they would have spotted it on Lnux.
> One difference is that on windows you have the drive letter and ":" included
> in the filename, eg D:\dir\subdir\filename.vhd while on linux you have
> "./filename.vhd or /dir/subdir/filename.vhd etc.
>
> best regards
> Peter Sørensen
>
> On 02-05-2010 16:21, Lennart Borgman wrote:
>>
>> Hi Peter,
>>
>> Why do you think this is specific to MS Windows? Wouldn't be better to
>> post this question to the general Emacs help list?
>>
>>
>> 2010/4/30 Peter Sørensen<address@hidden>:
>>
>>>
>>> I have not been able to make goto error line work for modelsim compile of
>>> vhdl files.
>>> I have not used emacs for many years, but I think I have done it right.
>>> I installed
>>> Emacs precompiled GNU Emacs 23.1.1 (i386-mingw-nt6.0.6002)
>>>  of 2009-07-30 on SOFT-MJASON
>>> on both windows7 and vista with the same result.
>>> The compile command itself works and every think is fine for vhdl files
>>> without any error, but when errors are found
>>> the find first error, find next error do not move the cursor to the
>>> errorline.
>>> I use the modelsim_ae version 6.5b  (from FPGA tool Altera Quartus ) but
>>> the
>>> vcom responds should be the same as a normal modelsim.
>>> I have tested a little on the regular expression for modelsim and it
>>> looks
>>> correct to me, but I am not exactly an expert.
>>>
>>> This is the message
>>> ** Error: (vcom-13) Recompile work.ifft_types because ieee.std_logic_1164
>>> has changed.
>>> ** Error: d:/Protelevision/SRAM/Buf_Ctrl.vhd(11): (vcom-1195) Cannot find
>>> expanded name "work.ifft_types".
>>> ** Error: d:/Protelevision/SRAM/Buf_Ctrl.vhd(11): Unknown expanded name.
>>> ** Error: d:/Protelevision/SRAM/Buf_Ctrl.vhd(13): VHDL Compiler exiting
>>>
>>> This is the regular expression
>>> \(ERROR\|WARNING\|\*\* Error\|\*\* Warning\)[^:]*: \(.+\)(\([0-9]+\)):
>>>
>>> best regards
>>> Peter Sørensen
>>>
>>>
>>>
>>>
>




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