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Re: [RFC PATCH 0/3] grub powerpc64 little-endian enablement


From: Paulo Flabiano Smorigo
Subject: Re: [RFC PATCH 0/3] grub powerpc64 little-endian enablement
Date: Fri, 26 Sep 2014 15:18:50 -0300
User-agent: Mutt/1.5.22.1 (2013-10-16)

Fri, Sep 26, 2014 at 07:52:02PM +0400, Andrei Borzenkov wrote:
> В Thu, 25 Sep 2014 19:48:04 -0300
> Paulo Flabiano Smorigo <address@hidden> пишет:
> 
> > Sun, Sep 21, 2014 at 06:24:25PM +0400, Andrei Borzenkov wrote:
> > > В Sun, 21 Sep 2014 17:58:44 +0400
> > > Andrei Borzenkov <address@hidden> пишет:
> > > 
> > > > В Thu, 28 Aug 2014 16:56:02 -0300
> > > > Paulo Flabiano Smorigo <address@hidden> пишет:
> > > > 
> > > > > From: Paulo Flabiano Smorigo <address@hidden>
> > > > > 
> > > > > Hi,
> > > > > 
> > > > > At the beginning of the year we provide a patchset that enabled GRUB 
> > > > > for
> > > > > little-endian PowerPC. Our approach at the time was to build GRUB 
> > > > > itself and
> > > > > its tools in 64-bit little-endian. One of the reasons of build in 
> > > > > 64-bit is
> > > > > to avoid 32-bit dependencies in the distro and build a system 
> > > > > entirely 64-bit.
> > > > > 
> > > > > This patchset was not welcomed at the time because it would bring a
> > > > > high-maintainance-cost, without real gain since it could just be 
> > > > > cross-compiled.
> > > > > 
> > > > > After that, Brent Baude, Vladmir (phcoder) and I started to work in a 
> > > > > solution
> > > > > that would cross-compile but without 32-bit dependencies. This 
> > > > > patchset is the
> > > > > result of this new approach. It's based on the work of Brent Baude, 
> > > > > Vladimir
> > > > > (phcoder), and Tomohiro.
> > > > > 
> > > > > It can be devided in two parts:
> > > > > 
> > > > >   1) Skip libgcc dependency just for ppc64el (patch 1 and 2);
> > > > >   2) Check elf endianess and byteswap if necessary (patch 3);
> > > > > 
> > > > > The result is GRUB itself in 32-bit BE and its tools in 64-bit LE. 
> > > > > This solution
> > > > > satisfies the needs of the distros. I tested it in three different 
> > > > > distros, in
> > > > > both endianess and it's fine.
> > > > > 
> > > > 
> > > > Unfortunately I'm still not able to boot this version on QEMU. I build
> > > > on openSUSE for three acrhs - ppc, ppc64, ppc64le. First two are OK and
> > > > boot successfully. Third one does not work - it ends up in exception. I
> > > > get initial GRUB greeting and that's all.
> > > > 
> > > > Same problem I got with Vladimir libgcc patch series.
> > > > 
> > > > It could be toolkit issue of course; but still it would need fixing
> > > > before we can merge it.
> > > > 
> > > > Could you help in debugging this issue? I have near to zero experience
> > > > with PPC; I can do what you tell me, but not much more.
> > > > 
> > > > I run it with
> > > > 
> > > > qemu-system-ppc64 -M pseries -cdrom /tmp/grub2-ppc64le.iso -boot d
> > > > 
> > > > Attached is screenshot of error.
> > > > 
> > > > 
> > > 
> > > And here is the difference in generated code in case it helps (one
> > > random module as example) ...
> > > 
> > > --- /tmp/a1       2014-09-21 18:19:59.316494117 +0400
> > > +++ /tmp/a2       2014-09-21 18:20:06.169398736 +0400
> > > @@ -1,5 +1,5 @@
> > >  
> > > -usr.ppc/lib/grub2/powerpc-ieee1275/ext2.mod:     file format 
> > > elf32-powerpc
> > > +usr.ppc64le/lib/grub2/powerpc-ieee1275/ext2.mod:     file format 
> > > elf32-powerpc
> > >  
> > >  
> > >  Disassembly of section .text:
> > > @@ -18,15 +18,15 @@ Disassembly of section .text:
> > >    28:    38 21 00 10     addi    r1,r1,16
> > >    2c:    7c 08 03 a6     mtlr    r0
> > >    30:    4e 80 00 20     blr
> > > -  34:    94 21 ff a0     stwu    r1,-96(r1)
> > > +  34:    94 21 ff 90     stwu    r1,-112(r1)
> > >    38:    38 e3 00 28     addi    r7,r3,40
> > >    3c:    7d 80 00 26     mfcr    r12
> > >    40:    39 23 00 14     addi    r9,r3,20
> > >    44:    7c 08 02 a6     mflr    r0
> > >    48:    39 43 00 18     addi    r10,r3,24
> > > -  4c:    bf 61 00 4c     stmw    r27,76(r1)
> > > -  50:    90 01 00 64     stw     r0,100(r1)
> > > -  54:    91 81 00 48     stw     r12,72(r1)
> > > +  4c:    bf 61 00 5c     stmw    r27,92(r1)
> > > +  50:    90 01 00 74     stw     r0,116(r1)
> > > +  54:    91 81 00 58     stw     r12,88(r1)
> > >    58:    3b c4 ff ff     addi    r30,r4,-1
> > >    5c:    7c 7f 1b 78     mr      r31,r3
> > >    60:    7c bc 2b 78     mr      r28,r5
> > > @@ -103,10 +103,10 @@ Disassembly of section .text:
> > >   17c:    2f 83 00 00     cmpwi   cr7,r3,0
> > >   180:    41 9e 00 08     beq     cr7,188 <grub_mod_init-0xd50>
> > >   184:    81 3d 00 00     lwz     r9,0(r29)
> > > - 188:    81 81 00 48     lwz     r12,72(r1)
> > > - 18c:    39 61 00 60     addi    r11,r1,96
> > > + 188:    81 81 00 58     lwz     r12,88(r1)
> > > + 18c:    39 61 00 70     addi    r11,r1,112
> > >   190:    7d 23 4b 78     mr      r3,r9
> > > - 194:    7d 80 81 20     mtcrf   8,r12
> > > + 194:    7d 90 81 20     mtocrf  8,r12
> > >   198:    48 00 00 00     b       198 <grub_mod_init-0xd40>
> > >   19c:    94 21 ff e0     stwu    r1,-32(r1)
> > >   1a0:    7c 08 02 a6     mflr    r0
> > > @@ -234,10 +234,10 @@ Disassembly of section .text:
> > >   388:    39 61 00 20     addi    r11,r1,32
> > >   38c:    80 69 00 00     lwz     r3,0(r9)
> > >   390:    48 00 00 00     b       390 <grub_mod_init-0xb48>
> > > - 394:    94 21 ff b0     stwu    r1,-80(r1)
> > > + 394:    94 21 ff a0     stwu    r1,-96(r1)
> > >   398:    7c 08 02 a6     mflr    r0
> > > - 39c:    be 61 00 1c     stmw    r19,28(r1)
> > > - 3a0:    90 01 00 54     stw     r0,84(r1)
> > > + 39c:    be 61 00 2c     stmw    r19,44(r1)
> > > + 3a0:    90 01 00 64     stw     r0,100(r1)
> > >   3a4:    7c df 33 78     mr      r31,r6
> > >   3a8:    7c be 2b 78     mr      r30,r5
> > >   3ac:    83 63 00 00     lwz     r27,0(r3)
> > > @@ -489,12 +489,12 @@ Disassembly of section .text:
> > >   784:    48 00 00 0c     b       790 <grub_mod_init-0x748>
> > >   788:    7f c3 f3 78     mr      r3,r30
> > >   78c:    7f e4 fb 78     mr      r4,r31
> > > - 790:    39 61 00 50     addi    r11,r1,80
> > > + 790:    39 61 00 60     addi    r11,r1,96
> > >   794:    48 00 00 00     b       794 <grub_mod_init-0x744>
> > > - 798:    94 21 ff e0     stwu    r1,-32(r1)
> > > + 798:    94 21 ff d0     stwu    r1,-48(r1)
> > >   79c:    7c 08 02 a6     mflr    r0
> > > - 7a0:    bf a1 00 14     stmw    r29,20(r1)
> > > - 7a4:    90 01 00 24     stw     r0,36(r1)
> > > + 7a0:    bf a1 00 24     stmw    r29,36(r1)
> > > + 7a4:    90 01 00 34     stw     r0,52(r1)
> > >   7a8:    3f a0 00 00     lis     r29,0
> > >   7ac:    7c 9e 23 78     mr      r30,r4
> > >   7b0:    83 e3 00 00     lwz     r31,0(r3)
> > > @@ -525,7 +525,7 @@ Disassembly of section .text:
> > >   814:    7f e3 fb 78     mr      r3,r31
> > >   818:    48 00 00 01     bl      818 <grub_mod_init-0x6c0>
> > >   81c:    3d 20 00 00     lis     r9,0
> > > - 820:    39 61 00 20     addi    r11,r1,32
> > > + 820:    39 61 00 30     addi    r11,r1,48
> > >   824:    80 69 00 00     lwz     r3,0(r9)
> > >   828:    48 00 00 00     b       828 <grub_mod_init-0x6b0>
> > >   82c:    94 21 ff e0     stwu    r1,-32(r1)
> > > @@ -555,13 +555,13 @@ Disassembly of section .text:
> > >   88c:    39 61 00 20     addi    r11,r1,32
> > >   890:    80 69 00 00     lwz     r3,0(r9)
> > >   894:    48 00 00 00     b       894 <grub_mod_init-0x644>
> > > - 898:    94 21 ff d0     stwu    r1,-48(r1)
> > > + 898:    94 21 ff c0     stwu    r1,-64(r1)
> > >   89c:    7c 6b 1b 78     mr      r11,r3
> > >   8a0:    7c 08 02 a6     mflr    r0
> > >   8a4:    7c a6 2b 78     mr      r6,r5
> > >   8a8:    38 ab 00 08     addi    r5,r11,8
> > > - 8ac:    bf c1 00 28     stmw    r30,40(r1)
> > > - 8b0:    90 01 00 34     stw     r0,52(r1)
> > > + 8ac:    bf c1 00 38     stmw    r30,56(r1)
> > > + 8b0:    90 01 00 44     stw     r0,68(r1)
> > >   8b4:    3b cb 00 70     addi    r30,r11,112
> > >   8b8:    7c 80 23 78     mr      r0,r4
> > >   8bc:    80 63 00 00     lwz     r3,0(r3)
> > > @@ -584,7 +584,7 @@ Disassembly of section .text:
> > >   900:    7d 64 5b 78     mr      r4,r11
> > >   904:    7c 05 03 78     mr      r5,r0
> > >   908:    48 00 00 01     bl      908 <grub_mod_init-0x5d0>
> > > - 90c:    39 61 00 30     addi    r11,r1,48
> > > + 90c:    39 61 00 40     addi    r11,r1,64
> > >   910:    48 00 00 00     b       910 <grub_mod_init-0x5c8>
> > >   914:    7c 68 1b 78     mr      r8,r3
> > >   918:    80 63 00 44     lwz     r3,68(r3)
> > > @@ -596,10 +596,10 @@ Disassembly of section .text:
> > >   930:    81 08 00 14     lwz     r8,20(r8)
> > >   934:    38 63 01 5c     addi    r3,r3,348
> > >   938:    4b ff ff 60     b       898 <grub_mod_init-0x640>
> > > - 93c:    94 21 fe c0     stwu    r1,-320(r1)
> > > + 93c:    94 21 fe b0     stwu    r1,-336(r1)
> > >   940:    7c 08 02 a6     mflr    r0
> > > - 944:    be c1 01 18     stmw    r22,280(r1)
> > > - 948:    90 01 01 44     stw     r0,324(r1)
> > > + 944:    be c1 01 28     stmw    r22,296(r1)
> > > + 948:    90 01 01 54     stw     r0,340(r1)
> > >   94c:    7c 7f 1b 78     mr      r31,r3
> > >   950:    7c 9a 23 78     mr      r26,r4
> > >   954:    7c b9 2b 78     mr      r25,r5
> > > @@ -715,7 +715,7 @@ Disassembly of section .text:
> > >   b0c:    2f 83 00 00     cmpwi   cr7,r3,0
> > >   b10:    41 9e fe b0     beq     cr7,9c0 <grub_mod_init-0x518>
> > >   b14:    38 60 00 01     li      r3,1
> > > - b18:    39 61 01 40     addi    r11,r1,320
> > > + b18:    39 61 01 50     addi    r11,r1,336
> > >   b1c:    48 00 00 00     b       b1c <grub_mod_init-0x3bc>
> > >   b20:    94 21 ff d0     stwu    r1,-48(r1)
> > >   b24:    39 20 00 00     li      r9,0
> > > @@ -769,10 +769,10 @@ Disassembly of section .text:
> > >   be4:    39 61 00 30     addi    r11,r1,48
> > >   be8:    80 7f 00 00     lwz     r3,0(r31)
> > >   bec:    48 00 00 00     b       bec <grub_mod_init-0x2ec>
> > > - bf0:    94 21 ff f0     stwu    r1,-16(r1)
> > > + bf0:    94 21 ff e0     stwu    r1,-32(r1)
> > >   bf4:    7c 08 02 a6     mflr    r0
> > > - bf8:    bf c1 00 08     stmw    r30,8(r1)
> > > - bfc:    90 01 00 14     stw     r0,20(r1)
> > > + bf8:    bf c1 00 18     stmw    r30,24(r1)
> > > + bfc:    90 01 00 24     stw     r0,36(r1)
> > >   c00:    7c 7f 1b 78     mr      r31,r3
> > >   c04:    81 23 00 88     lwz     r9,136(r3)
> > >   c08:    2f 89 00 00     cmpwi   cr7,r9,0
> > > @@ -821,7 +821,7 @@ Disassembly of section .text:
> > >   cb4:    7d 20 fc 2c     lwbrx   r9,0,r31
> > >   cb8:    7f c3 f3 78     mr      r3,r30
> > >   cbc:    7d 5e 49 ae     stbx    r10,r30,r9
> > > - cc0:    39 61 00 10     addi    r11,r1,16
> > > + cc0:    39 61 00 20     addi    r11,r1,32
> > >   cc4:    48 00 00 00     b       cc4 <grub_mod_init-0x214>
> > >   cc8:    94 21 ff d0     stwu    r1,-48(r1)
> > >   ccc:    7c 08 02 a6     mflr    r0
> > > @@ -878,14 +878,14 @@ Disassembly of section .text:
> > >   d98:    4e 80 04 21     bctrl
> > >   d9c:    39 61 00 30     addi    r11,r1,48
> > >   da0:    48 00 00 00     b       da0 <grub_mod_init-0x138>
> > > - da4:    94 21 ff d0     stwu    r1,-48(r1)
> > > + da4:    94 21 ff c0     stwu    r1,-64(r1)
> > >   da8:    39 20 00 00     li      r9,0
> > >   dac:    7c 08 02 a6     mflr    r0
> > > - db0:    bf 41 00 18     stmw    r26,24(r1)
> > > + db0:    bf 41 00 28     stmw    r26,40(r1)
> > >   db4:    3f a0 00 00     lis     r29,0
> > >   db8:    7c 7f 1b 78     mr      r31,r3
> > >   dbc:    80 7d 00 00     lwz     r3,0(r29)
> > > - dc0:    90 01 00 34     stw     r0,52(r1)
> > > + dc0:    90 01 00 44     stw     r0,68(r1)
> > >   dc4:    7c 9a 23 78     mr      r26,r4
> > >   dc8:    91 21 00 08     stw     r9,8(r1)
> > >   dcc:    48 00 00 01     bl      dcc <grub_mod_init-0x10c>
> > > @@ -953,23 +953,23 @@ Disassembly of section .text:
> > >   ec4:    80 7b 00 00     lwz     r3,0(r27)
> > >   ec8:    48 00 00 01     bl      ec8 <grub_mod_init-0x10>
> > >   ecc:    7f a3 eb 78     mr      r3,r29
> > > - ed0:    39 61 00 30     addi    r11,r1,48
> > > + ed0:    39 61 00 40     addi    r11,r1,64
> > >   ed4:    48 00 00 00     b       ed4 <grub_mod_init-0x4>
> > >  
> > >  00000ed8 <grub_mod_init>:
> > > - ed8:    94 21 ff f0     stwu    r1,-16(r1)
> > > + ed8:    94 21 ff e0     stwu    r1,-32(r1)
> > >   edc:    3c 80 00 00     lis     r4,0
> > >   ee0:    7c 08 02 a6     mflr    r0
> > >   ee4:    38 84 00 00     addi    r4,r4,0
> > > - ee8:    93 e1 00 0c     stw     r31,12(r1)
> > > + ee8:    93 e1 00 1c     stw     r31,28(r1)
> > >   eec:    7c 7f 1b 78     mr      r31,r3
> > >   ef0:    3c 60 00 00     lis     r3,0
> > > - ef4:    90 01 00 14     stw     r0,20(r1)
> > > + ef4:    90 01 00 24     stw     r0,36(r1)
> > >   ef8:    38 63 00 00     addi    r3,r3,0
> > >   efc:    48 00 00 01     bl      efc <grub_mod_init+0x24>
> > >   f00:    3d 20 00 00     lis     r9,0
> > >   f04:    93 e9 00 00     stw     r31,0(r9)
> > > - f08:    39 61 00 10     addi    r11,r1,16
> > > + f08:    39 61 00 20     addi    r11,r1,32
> > >   f0c:    48 00 00 00     b       f0c <grub_mod_init+0x34>
> > >  
> > >  00000f10 <grub_mod_fini>:
> > > 
> > > 
> > > _______________________________________________
> > > Grub-devel mailing list
> > > address@hidden
> > > https://lists.gnu.org/mailman/listinfo/grub-devel
> > 
> > 
> > Hi Andrei,
> > 
> > I find out that VSX was the culprit. Can you please take a look at this
> > patch?
> > http://lists.gnu.org/archive/html/grub-devel/2014-09/msg00077.html
> > 
> > 
> 
> 
> 
> With this patch it works. I'm really surprised - the same sources built
> on different platform (ppc BE) did work without problems. I do not
> understand how this can be possible if the problem was in specific CPU
> mode. It should have been the same in both cases ...

Check "gcc -v" for --with-cpu=power7. That flag enables VSX and Altivec.

> 
> _______________________________________________
> Grub-devel mailing list
> address@hidden
> https://lists.gnu.org/mailman/listinfo/grub-devel

-- 
Paulo Flabiano Smorigo
IBM Linux Technology Center




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