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Re: [RFT] Use pair of shifts instead of and in ARM code


From: Leif Lindholm
Subject: Re: [RFT] Use pair of shifts instead of and in ARM code
Date: Wed, 13 Nov 2013 15:16:08 +0100
User-agent: Mutt/1.5.21 (2010-09-15)

On Wed, Nov 13, 2013 at 01:00:17AM +0100, Vladimir 'φ-coder/phcoder' Serbinenko 
wrote:
> 1ff and 3fff can't be easily loaded on ARM. This patch replaces load+and
> with pair of shift to keep only wanted bits.
 
Actually, on ARMv7 we could just use MOVW instead:

> diff --git a/grub-core/kern/arm/cache_armv7.S
> b/grub-core/kern/arm/cache_armv7.S
> index 0c16b10..454bad3 100644
> --- a/grub-core/kern/arm/cache_armv7.S
> +++ b/grub-core/kern/arm/cache_armv7.S
> @@ -58,11 +64,17 @@ clean_invalidate_dcache:
>         @ read current cache information
>         mrc     p15, 1, r8, c0, c0, 0   @ Read CCSIDR
>         lsr     r3, r8, #13             @ Number of sets -1
> -       ldr     r9, =0x3fff
        movw    r9, #0x3fff
> -       and     r3, r3, r9
> +
> +       @ Keep only 14 bits of r3
> +       lsl     r3, r3, #18
> +       lsr     r3, r3, #18
> +
>         lsr     r4, r8, #3              @ Number of ways -1
> -       ldr     r9, =0x1ff
        movw    r9, #0x1ff
> -       and     r4, r4, r9
> +
> +       @ Keep only 9  bits of r4
> +       lsl     r4, r4, #23
> +       lsr     r4, r4, #23
> +
>         and     r7, r8, #7              @ log2(line size in words) - 2
>         add     r7, r7, #2              @  adjust
>         mov     r8, #1
> 

/
    Leif



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